TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 46
TMP92xy29FG
Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY29FG.pdf
(764 pages)
Specifications of TMP92xy29FG
Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
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releasing Halt
Interrupt for
D0~D15
A0~A23
c.
Figure 3.4.9 Timing chart for STOP Mode Halt state cleared by interrupt
WR
RD
Table 3.4.6 Example of warming-up time after releasing STOP-mode
X1
STOP Mode
oscillator.
warm-up time has elapsed, in order to allow oscillation to stabilize.
an interrupt.
When STOP Mode is selected, all internal circuits stop, including the internal
After STOP Mode has been cleared system clock output starts when the
Figure 3.4.9 illustrates the timing for clearance of the STOP Mode Halt state by
01 (2
25.6 μ s
8
)
SYSCR2<WUPTM1:0>
Data
92CF29A-44
1.6384 ms
10 (2
14
STOP
)
mode
Warm-up
time
6.5536 ms
11 (2
at f
OSCH
16
)
= 10 MHz
TMP92CF29A
2009-06-11
Data
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