TMP86xy45UG Toshiba, TMP86xy45UG Datasheet - Page 65

• Manufacturer Part Number: TMP86xy45UG
• Manufacturer: Toshiba

Specifications of TMP86xy45UG

• Package: QFP44
• Rom Types (m=mask,p=otp,f=flash): M/P
• Rom Size: 8
• Ram Size: 256
• Driver Led: 19
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: -
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 8
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: -
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 35
• Power Supply (v): 2.7 to 5.5

6.1 Time Base Timer
Example :Set the time base timer frequency to fc/2
6.1.3 Function
Note 2: The interrupt frequency (TBTCK) must be selected with the time base timer disabled (TBTEN="0"). (The interrupt fre-
output of the timing generato which is selected by TBTCK. ) after time base timer has been enabled.
interrupt period ( Figure 6-2 ).
Table 6-1 Time Base Timer Interrupt Frequency ( Example : fc = 16.0 MHz, fs = 32.768 kHz )
An INTTBT ( Time Base Timer Interrupt ) is generated on the first falling edge of source clock ( The divider
The divider is not cleared by the program; therefore, only the first interrupt may be generated ahead of the set
quency must not be changed with the disable from the enable state.) Both frequency selection and enabling can be per-
formed simultaneously.
TBTCK
000
001
010
100
101
011
110
111
Source clock
TBTCR<TBTEN>
INTTBT
LD
LD
DI
SET
NORMAL1/2, IDLE1/2 Mode
Figure 6-2 Time Base Timer Interrupt
DV7CK = 0
(TBTCR) , 00000010B
(TBTCR) , 00001010B
(EIRL) . 6
1953.13
3906.25
244.14
976.56
7812.5
31250
1.91
7.63
Enable TBT
16
[Hz] and enable an INTTBT interrupt.
Time Base Timer Interrupt Frequency [Hz]
Page 54
NORMAL1/2, IDLE1/2 Mode
Interrupt period
DV7CK = 1
16384
1024
2048
4096
128
512
1
4
; TBTCK ← 010
; TBTEN ← 1
; IMF ← 0
SLOW1/2, SLEEP1/2 Mode
1
4
–
–
–
–
–
–
TMP86C845UG