TMP86xy46NG Toshiba, TMP86xy46NG Datasheet - Page 72

• Manufacturer Part Number: TMP86xy46NG
• Manufacturer: Toshiba

Specifications of TMP86xy46NG

• Package: SDIP42
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 8/16/32
• Ram Size: 512/512/1K
• Driver Led: 19
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 8
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 33
• Power Supply (v): 4.5 to 5.5

7.2.5 Watchdog Timer Reset
Clock
Binary counter
Overflow
INTWDT interrupt request
(WDTCR1<WDTOUT>= "0")
Internal reset
(WDTCR1<WDTOUT>= "1")
WDT reset output
request is generated. When a watchdog timer reset request is generated, the
nal and the internal hardware is reset. The reset time is maximum 24/fc [s] (1.5 µs @ fc = 16.0 MHz).
When a binary-counter overflow occurs while WDTCR1<WDTOUT> is set to “1”, a watchdog timer reset
Note:When a watchdog timer reset is generated in the SLOW1 mode, the reset time is maximum 24/fc (high-fre-
quency clock) since the high-frequency clock oscillator is restarted. However, when crystals have inaccura-
cies upon start of the high-frequency clock oscillator, the reset time should be considered as an approximate
value because it has slight errors.
Figure 7-2 Watchdog Timer Interrupt/Reset
1
Write 4E
2
H
to WDTCR2
3
2
17
/fc
0
Page 61
(High-Z)
1
2
19
/fc [s]
2
RESET
3
pin outputs a low-level sig-
A reset occurs
0
TMP86PM46NG
(WDTT=11)