74LVC827ADB,112 NXP Semiconductors, 74LVC827ADB,112 Datasheet

IC BUFF DVR TRI-ST 10BIT 24SSOP

74LVC827ADB,112

Manufacturer Part Number
74LVC827ADB,112
Description
IC BUFF DVR TRI-ST 10BIT 24SSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC827APW118.pdf (17 pages)

Specifications of 74LVC827ADB,112

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
10
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Logic Family
LVC
Number Of Channels Per Chip
10
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
10 / 10
Output Type
3-State
Propagation Delay Time
10 ns at 1.2 V, 2.8 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC827ADB
74LVC827ADB
935262419112
1. General description
2. Features
3. Quick reference data
The 74LVC827A is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. In 3-state operation outputs can
handle 5 V. These features allow the use of these devices as translators in a mixed
3.3 V and 5 V environment.
The 74LVC827A is a 10-bit buffer/line driver with 3-state outputs. The 3-state outputs are
controlled by the output enable pins OE1 and OE2. A HIGH on pin OEn causes the
outputs to assume a high-impedance OFF-state.
Table 1:
GND = 0 V; T
Symbol
t
t
t
C
PHL
PZH
PHZ
I
74LVC827A
10-bit buffer/line driver with 5 V tolerant inputs/outputs;
3-state
Rev. 02 — 8 April 2004
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
Complies with JESD8-B and EIA/JESD36
ESD protection:
Specified from 40 C to +85 C and 40 C to +125 C.
, t
, t
, t
PLH
PZL
PLZ
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Quick reference data
Parameter
propagation delay An to Yn C
3-state output enable times
OEn to Yn
3-state output disable
times OEn to Yn
input capacitance
amb
= 25 C; t
r
= t
f
2.5 ns.
Conditions
V
C
V
C
V
CC
CC
CC
L
L
L
= 50 pF;
= 50 pF;
= 50 pF;
= 3.3 V
= 3.3 V
= 3.3 V
Product data sheet
Min
-
-
-
-
Typ
2.8
3.5
2.9
5.0
Max
-
-
-
-
Unit
ns
ns
ns
pF

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74LVC827ADB,112 Summary of contents

Page 1

V tolerant inputs/outputs; 3-state Rev. 02 — 8 April 2004 1. General description The 74LVC827A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be ...

Page 2

Philips Semiconductors Table 1: GND = Symbol input frequency in MHz output frequency in MHz output load capacitance in pF; ...

Page 3

Philips Semiconductors 5. Functional diagram Fig 1. Logic symbol. 9397 750 13037 Product data sheet 10-bit buffer/line driver with 5 V tolerant inputs/outputs; 3-state ...

Page 4

Philips Semiconductors Fig 3. Logic diagram. 9397 750 13037 Product data sheet 10-bit buffer/line driver with 5 V tolerant inputs/outputs; 3-state ...

Page 5

Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 4. Pin configuration. 6.2 Pin description Table 3: Pin 9397 750 ...

Page 6

Philips Semiconductors Table 3: Pin Functional description 7.1 Function table Table 4: Input OE1 [ HIGH voltage level LOW voltage level don’t care high-impedance ...

Page 7

Philips Semiconductors 9. Recommended operating conditions Table 6: Symbol amb 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = ...

Page 8

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter +125 C amb V HIGH-level input IH voltage V LOW-level input IL voltage V ...

Page 9

Philips Semiconductors Table 8: Dynamic Characteristics GND = 0 V; see Figure 7. Symbol Parameter 3-state output disable PHZ PLZ time OEn skew sk(0) C power dissipation PD capacitance per buffer ...

Page 10

Philips Semiconductors 12. Waveforms Fig 5. The input An to output Yn propagation delays. Table 9: Supply voltage V CC < 2.7 V 2.7 V Fig 6. 3-state enable and disable times. Table 10: Supply voltage V CC < 2.7 ...

Page 11

Philips Semiconductors Fig 7. Load circuitry for switching times. Table 11: Supply voltage V CC 1.2 V 2 3.6 V [1] The circuit performs better when R 9397 750 13037 Product data sheet 10-bit buffer/line driver ...

Page 12

Philips Semiconductors 13. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT ...

Page 13

Philips Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. ...

Page 14

Philips Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

Page 15

Philips Semiconductors 14. Revision history Table 12: Revision history Document ID Release date 74LVC827A_2 20040408 • Modifications: The format of this data sheet has been redesigned to comply with the presentation and information standard of Philips Semiconductors. • Section 2 ...

Page 16

Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 17

Philips Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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