PD45128168G5-A75A-9JF Elpida Memory, Inc., PD45128168G5-A75A-9JF Datasheet - Page 23

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PD45128168G5-A75A-9JF

Manufacturer Part Number
PD45128168G5-A75A-9JF
Description
128M-bit synchronous DRAM 4-bank, LVTTL MOS integrated circuit
Manufacturer
Elpida Memory, Inc.
Datasheet
7.1 Burst Length and Sequence
[Burst of Two]
[Burst of Four]
[Burst of Eight]
device), 1,024 (for 16M 8 device), and 512 (for 8M 16 device).
Full page burst is an extension of the above tables of sequential addressing, with the length being 2,048 (for 32M 4
(column address A1 - A0, binary)
(column address A2 - A0, binary)
(column address A0, binary)
Starting address
Starting address
Starting address
000
001
010
011
100
101
110
111
00
01
10
11
0
1
Sequential addressing sequence
Sequential addressing sequence
Sequential addressing sequence
0, 1, 2, 3, 4, 5, 6, 7
1, 2, 3, 4, 5, 6, 7, 0
2, 3, 4, 5, 6, 7, 0, 1
3, 4, 5, 6, 7, 0, 1, 2
4, 5, 6, 7, 0, 1, 2, 3
5, 6, 7, 0, 1, 2, 3, 4
6, 7, 0, 1, 2, 3, 4, 5
7, 0, 1, 2, 3, 4, 5, 6
(decimal)
(decimal)
(decimal)
0, 1, 2, 3
1, 2, 3, 0
2, 3, 0, 1
3, 0, 1, 2
Data Sheet E0031N30
0, 1
1, 0
PD45128441, 45128841, 45128163
Interleave addressing sequence
Interleave addressing sequence
Interleave addressing sequence
0, 1, 2, 3, 4, 5, 6, 7
1, 0, 3, 2, 5, 4, 7, 6
2, 3, 0, 1, 6, 7, 4, 5
3, 2, 1, 0, 7, 6, 5, 4
4, 5, 6, 7, 0, 1, 2, 3
5, 4, 7, 6, 1, 0, 3, 2
6, 7, 4, 5, 2, 3, 0, 1
7, 6, 5, 4, 3, 2, 1, 0
(decimal)
(decimal)
(decimal)
0, 1, 2, 3
1, 0, 3, 2
2, 3, 0, 1
3, 2, 1, 0
0, 1
1, 0
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