PD45128168G5-A75A-9JF Elpida Memory, Inc., PD45128168G5-A75A-9JF Datasheet - Page 4

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PD45128168G5-A75A-9JF

Manufacturer Part Number
PD45128168G5-A75A-9JF
Description
128M-bit synchronous DRAM 4-bank, LVTTL MOS integrated circuit
Manufacturer
Elpida Memory, Inc.
Datasheet
Pin Configurations
/xxx indicates active low signal.
4
A0 to A11
BA0(A13), BA1(A12) : Bank select
DQ0 to DQ3
CLK
CKE
/CS
/RAS
/CAS
/WE
DQM
V
V
V
V
NC
CC
SS
CC
SS
Q
Q
Note
BA0(A13)
BA1(A12)
V
V
/CAS
/RAS
V
V
DQ0
DQ1
/WE
A10
CC
CC
/CS
SS
SS
V
V
V
NC
NC
NC
NC
NC
NC
NC
: Address inputs
: Data inputs / outputs
: Clock input
: Clock enable
: Chip select
: Row address strobe
: Column address strobe
: Write enable
: DQ mask enable
: Supply voltage
: Ground
: Supply voltage for DQ
: Ground for DQ
: No connection
A0
A1
A2
A3
CC
CC
CC
Q
Q
Q
Q
54-pin Plastic TSOP (II) (10.16mm (400))
8M words
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Data Sheet E0031N30
[ PD45128441]
4 bits
4 banks
PD45128441, 45128841, 45128163
Note A0 to A11
A0 to A9, A11 : Column address inputs
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
Vss
NC
VssQ
NC
DQ3
VccQ
NC
NC
VssQ
NC
DQ2
VccQ
NC
Vss
NC
DQM
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
Vss
: Row address inputs

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