STG3000X STMicroelectronics, STG3000X Datasheet - Page 60

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STG3000X

Manufacturer Part Number
STG3000X
Description
128-BIT 3D MULTIMEDIA ACCELERATOR
Manufacturer
STMicroelectronics
Datasheet
RIVA 128
NOTES
13.6 FREQUENCY SYNTHESIS CHARACTERISTICS
NOTE
60/77
Parameter
XTALIN crystal frequency range
Internal VCO frequency
Memory clock output frequency
Pixel clock output frequency
Pixel clock output frequency (video displayed)
Synthesizer lock time
1 Blanking pedestals are not supported in TV output mode.
2 VREF = 1.235V, RSET = 147
3 LSB
4 About the midpoint of the distribution of the three DACs
5 37.5ohm, 30pF load
6 10% to 90%
7 Settling to within 2% of full scale deflection
8 Monotonicity guaranteed
1 A series resonant crystal should be connected to XTALIN
2 The pixel clock can be programmed to within 0.5% of any target frequency 10
3 The maximum pixel clock frequency when the RIVA 128 is displaying full motion video
8
= 1 LSB of 8-bit resolution DAC
Min
4
128
128-BIT 3D MULTIMEDIA ACCELERATOR
Typ.
Max
15
256
100
230
110
500
f
pixclk
230MHz
Units
MHz
MHz
MHz
MHz
MHz
s
Notes
1
2
3

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