STG3000X STMicroelectronics, STG3000X Datasheet - Page 73

• Manufacturer Part Number: STG3000X
• Description: 128-BIT 3D MULTIMEDIA ACCELERATOR
• Manufacturer: STMicroelectronics

128-BIT 3D MULTIMEDIA ACCELERATOR
Byte offset 0x3F - 0x3C
MAX_LAT Register (0x3F
MIN_GNT Register (0x3E)
Interrupt Pin Register (0x3D)
Interrupt Line Register (0x3C)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:24
23:16
15:8
Bits
Bits
Bits
Bits
7:0
0x3F
Function
The MAX_LAT bits contain the maximum time the RIVA 128 requires to gain
access to the PCI bus. This read-only register is used to specify the RIVA
128’s desired settings for Latency Timer values. The value specifies a period
of time in units of 250ns.
1=250ns
Function
The MIN_GNT bits contain the length of the burst period the RIVA 128 needs,
assuming a clock rate of 33MHz. This read-only register is used to specify the
RIVA 128's desired settings for Latency Timer values. The value specifies a
period of time in units of 250ns.
3=750ns
Function
The INTERRUPT_PIN bits contain the interrupt pin the device (or device func-
tion) uses. A value of 1 corresponds to INTA#.
Function
The INTERRUPT_LINE bits contain the interrupt routing information. POST
software will write the routing information into this register as it initializes and
configures the system. The value in this field indicates which input of the sys-
tem interrupt controller(s) the RIVA 128's interrupt pin is connected to. Device
drivers and operating systems can use this information to determine priority
and vector information. INTERRUPT_LINE is initialized to 0xFF (no connec-
tion) at reset.
0=Interrupt line IRQ0
1=Interrupt line IRQ1
0xF=Interrupt line IRQ15
0xFF=No interrupt line connection (reset value)
)
0x3E
0x3D
9
8
7
6
5
0x3C
4
R W 0xFF
RIVA 128
3
R W I
R W I
R W I
R W I
R - 1
R - 3
R - 1
2
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