PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 175

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0039H: STLI PGM Clock Configuration
All Reserved bits must be set to their default values for proper operation.
PGMTCLKEN
PGMTCLKSEL
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The programmable transmit clock enable (PGMTCLKEN) bit controls the gating of the
PGMTCLK output clock. When PGMTCLKEN is set to logic one, the PGMTCLK output
clock operates normally. When PGMTCLKEN is set to logic zero, the PGMTCLK output
clock is held low.
The programmable transmit clock frequency selection (PGMTCLKSEL) bit selects the
frequency of the PGMTCLK output clock. When PGMTCLKSEL is set high, PGMTCLK is
a nominal 8 KHz clock. When PGMTCLKSEL is set to logic zero, PGMTCLK is a nominal
19.44 MHz clock.
Type
R/W
R/W
R/W
R/W
Unused
Unused
Unused
Unused
Unused
Unused
Reserved
Reserved
PGMTCLKSEL
PGMTCLKEN
Function
Unused
Unused
Unused
Unused
Unused
Unused
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
0
0
Released
175