PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 295

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Indirect Register 05H: THPP Transmit J1 and C2
J1[7:0]
C2[7:0]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The J1[7:0] bits are inserted in the J1 byte position when the SRCJ1 bit of the THPP Source
& Pointer Control Register is logic 0 and TPOHEN is low during the path trace bit positions
in the path overhead input stream, TPOH. J1[7:0] is inserted into the J1 position of the POH
when register insertion is enabled. See Table 6 Path Overhead Byte Source Priority for
details.
This field is only valid for THPP STS-1/STM0 #1.
The C2[7:0] bits are inserted in the C2 byte position when the SRCC2 bit of the THPP Source
& Pointer Control Register is logic 0 and TPOHEN is low during the path signal label bit
positions in the path overhead input stream, TPOH. C2[7:0] is inserted into the C2 position
of the POH when register insertion is enabled. See Table 6 Path Overhead Byte Source
Priority for details.
This field is only valid for THPP STS-1/STM0 #1.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
C2[7]
C2[6]
C2[5]
C2[4]
C2[3]
C2[2]
C2[1]
C2[0]
J1[7]
J1[6]
J1[5]
J1[4]
J1[3]
J1[2]
J1[1]
J1[0]
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Released
295