LPC1769 NXP Semiconductors, LPC1769 Datasheet - Page 62
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LPC1769
Manufacturer Part Number
LPC1769
Description
32-bit Arm Cortex-m3 Microcontroller; Up To 512 Kb Flash And 64 Kb Sram With Ethernet, Usb 2.0 Host/device/otg, Can
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1769.pdf
(66 pages)
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17. Revision history
Table 19.
LPC1769_68_67_66_65_64_4
Product data sheet
Document ID
LPC1769_68_67_66_65_64_4
Modifications:
LPC1768_67_66_65_64_3
Modifications:
LPC1768_66_65_64_2
LPC1768_66_65_64_1
Revision history
Release date Data sheet status
20100201
20091119
20090211
20090115
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ADC static characteristics: Parameter R
Table note 14 in
In
Added part LPC1769.
Added output pin parameters t
Added SRAM sizes for CPU SRAM, AHB SRAM0, and AHB SRAM1 in
Added table note for XTAL1 and XTAL2 pins in
Changed minimum value of parameters V
−0.5 V.
Changed data sheet status to Product data sheet.
Added part LPC1767.
Maximum data bit rate for SPI, SSP, UART added.
RTC backup RAM size updated (20 bytes).
WDT clock source added: RTC oscillator.
Table 15 “Dynamic characteristics of SPI pins” updated.
ADC conversion rate changed to 200 kHz.
Updated motor control PWM pin names in Table 3 “Pin description” and Figure 1
“Block diagram”.
V
V
Power consumption data added to Table 6.
Flash characteristics table updated (Table 7).
I
I
Added Section 10.1 “Electrical pin characteristics”.
Changed V
Changed V
Table 16 “ADC characteristics” updated.
DAC electrical characteristics updated (Table 17).
Section 14.2 “XTAL1 input” and Section 14.3 “XTAL and RTCX Printed Circuit Board
(PCB) layout guidelines”) added.
Removed symbols from timing diagram (Figure 12).
Updated Figure 3 “LPC17xx memory map”.
2
2
DDA
ESD
C-bus timing characteristics updated (Table 11).
S-bus timing characteristics updated (Table 12).
Table
changed to ±4000 V (Table 4).
and VREFP pin descriptions updated (Table 3).
6, move parameter V
Product data sheet
Product data sheet
Objective data sheet
Objective data sheet
Rev. 04 — 1 February 2010
I
I
to 5.5 V (max) in Table 4.
to 5.0 V (max) in Table 6.
Table 6
updated.
hys
LPC1769/68/67/66/65/64
r
and t
from typical to minimum.
f
(Section
Change notice Supersedes
-
-
-
vsi
32-bit ARM Cortex-M3 microcontroller
i(XTAL1)
and
11.4).
Figure 22
Table
, V
i(XTAL2)
3.
added.
LPC1768_67_66_65_64_3
LPC1768_66_65_64_2
LPC1768_66_65_64_1
-
, V
i(RTCX1)
© NXP B.V. 2010. All rights reserved.
, and V
Table
i(RTCX2)
2.
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