HY27SA161G1M Hynix Semiconductor, HY27SA161G1M Datasheet - Page 11

• Manufacturer Part Number: HY27SA161G1M
• Description: 1gbit 128mx8bit / 64mx16bit Nand Flash Memory
• Manufacturer: Hynix Semiconductor

Table 2. Bus Operation
Note : (1) Only for x16 devices.
Table 3: Address Insertion, x8 Devices
Note: (1). A8 is set Low or High by the 00h or 01h Command, see Pointer Operations section.
Table4: Address Insertion, x16 Devices
Note: (1). A8 is Don
Rev 0.5 / Oct. 2004
Command Input
Address Input
Data Input
Data Output
Write Protect
Standby
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
Bus Cycle
Bus Cycle
BUS Operation
(2). Any additional address input cycles will be ignored with tALS > 0ns.
(2). Any additional address input cycles will be ignored with tALS > 0ns.
(3). A1 is the Least Significant Address for x16 devices.
(4). The 01h Command is not used in x16 devices.
(2) WP must be V
I/O
'
t Care in x16 devices.
O
V
X
X
X
8
15
I/O
IL
A16
A24
-I/
V
A7
IH
IL
7
when issuing a program or erase command.
V
CE
V
V
V
V
X
IH
IL
IL
IL
IL
I/O
A16
A24
V
A7
IL
I/O
7
A15
A23
V
A6
ALE
IL
V
V
V
V
X
X
6
IH
IL
IL
IL
I/O
A15
A23
V
A6
IL
6
CLE
V
V
V
V
I/O
X
X
IH
IL
IL
IL
A14
A22
V
A5
IL
5
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
I/O
Falling
A14
A22
V
A5
V
V
V
RE
IL
X
X
IH
IH
IH
5
I/O
A13
A21
V
A4
IL
4
Rising
Rising
Rising
WE
I/O
V
A13
A21
X
X
V
A4
IH
IL
4
I/O
A12
A20
V
A3
HY27UA(08/16)1G1M Series
HY27SA(08/16)1G1M Series
IL
WP
X
V
X
X
X
X
(2)
3
IL
I/O
A12
A20
V
A3
IL
3
I/O
I/O
Data Output
A11
A19
Data Input
Command
V
A2
Address
IL
I/O
0
2
A11
A19
V
A2
X
X
- I/O
IL
2
7
I/O
A10
A18
A26
A1
I/O
A26
A10
A18
A1
1
I/O
1
Data Output
Data Input
8
- I/O
X
X
X
X
I/O
A17
A25
I/O
A0
A9
A17
A25
15
A0
A9
0
(1)
0
11