HN29V1G91T-30 Renesas Electronics Corporation., HN29V1G91T-30 Datasheet - Page 13

• Manufacturer Part Number: HN29V1G91T-30
• Description: 128m X 8-bit Ag-and Flash Memory
• Manufacturer: Renesas Electronics Corporation.

HN29V1G91T-30
Multi Bank Read
Multi Bank Read operation enables to read the data of any Page address in 4 bank. Writing 00h command
with four address cycles can be specified to maximum 4 Bank. There is no restriction on an order of a
Bank to specify.
Page address specified later becomes effective when it is specified twice in the same Bank.
The device become Ready state at rising edge of 9- after writing 31h command with specifying address
and the data transfer from the memory array to the data register is started.
After it becomes Ready state, it executes specifying a bank for read and column address for starting read by
writing 06h and E0h command with four address cycles. After that the device output the data serially from
column address which is specified by clocking 4-. It is possible to specify any bank for read and to read
the data which is transferred to the data register repeatedly.
R/*
Note: 1. (2) (3) (4) (5): repeatable
Rev.4.00, Jun.20.2004, page 13 of 89
I/O
I/O
R/*
Memory array
Data register
Memory array
Data register
(A)
(B)
00h Address
column J
page N
Bank0
06h Address E0h
column J’
column L’
page Q
Bank2
00h Address
Bank 0
Page N
Bank 0
Page N
column K
page P
Bank1
(2)
(4)
D
OUT
00h Address
(1)
column L
page Q
D
Bank2
OUT
06h Address E0h
00h
column M’
page R
column K’
Address
Bank3
column M
page R
Bank 1
Bank 1
Page P
Bank3
Page P
(3)
(5)
31h
D
OUT
t
R
(1)
06h
D
OUT
column L’
column J’
page N
Address
Bank0
Bank 2
Page Q
Bank 2
(2)
Page Q
E0h D
(4)
OUT
D
OUT
06h
Address
column K’
page P
Bank1
column M’
Bank 3
Bank 3
Page R
Page R
(5)
(3)
E0h D
OUT
D
OUT
(A)
(B)