HN29V1G91T-30 Renesas Electronics Corporation., HN29V1G91T-30 Datasheet - Page 86
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HN29V1G91T-30
Manufacturer Part Number
HN29V1G91T-30
Description
128m X 8-bit Ag-and Flash Memory
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.HN29V1G91T-30.pdf
(92 pages)
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HN29V1G91T-30
erase/program/read operation, the command operation is forced to terminate and the applied page data is
not guaranteed.
8. Notes on the power supply down
Please do not turn off a power supply in erase busy operation.
It is required to take the following measures on system side for expected power down.
When the power down is recognized to have occurred during erase busy operation, device recovery mode
after the power on. The data in other blocks are protected, though the data in the applied block is invalid,
by doing this.
Notes: 1. Please input any address for CA1 and CA2. Input an arbitrary address to CA1 and CA2.
t
Rev.4.00, Jun.20.2004, page 86 of 89
DRC
2. The address input is necessary for RA1 and RA2 and RA4. Input 00h respectively.
3. Busy time (t
4. This protect operation is pause to input FF command or 4-5 = L. In case of this pause, the
For RA3, input 04h.
time in normal operation. When the data protect operation is executed, the time of 100ms or
less is needed.
protect operation is not guaranteed.
R/*
I/O
00h
DRC
CA1 CA2
) is as follows. When the data protect operation is unnecessary, end at the typ
R/*
R/*
4-5
typ
890µs
Address input
I/O
I/O
00h CA1 CA2 RA1
00h CA1 CA2 RA1
RA1
RA2
38h
RA2
RA2
Busy
t
DRC
38h
38h
max
100ms
00h
CA1 CA2
FFh
t RSTDR
=350µs max
t RSTDR
=350µs max
350µs min
RA3
RA4
38h
Busy
t
DRC
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