PHB11N50E NXP Semiconductors, PHB11N50E Datasheet
PHB11N50E
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PHB11N50E Summary of contents
Page 1
... N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. The PHW11N50E is supplied in the SOT429 (TO247) conventional leaded package. The PHB11N50E is supplied in the SOT404 surface mounting package. PINNING PIN DESCRIPTION ...
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... L Internal source inductance s C Input capacitance iss C Output capacitance oss C Feedback capacitance rss 2 pulse width and repetition rate limited by T December 1998 PHB11N50E, PHW11N50E CONDITIONS Unclamped inductive load 10 0.2 ms; T prior to avalanche = 25˚ ...
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... Continuous source current S (body diode) I Pulsed source current (body T SM diode) V Diode forward voltage SD t Reverse recovery time rr Q Reverse recovery charge rr December 1998 PHB11N50E, PHW11N50E CONDITIONS T = 25˚ 25˚ dI/dt = 100 ...
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... Drain-Source On Resistance, RDS(on) (Ohms) 1.4 PHP11N50E 0.8 100 us 0 0.4 100 ms 0.2 0 1000 ˚C Fig.6. Typical on-state resistance . Product specification PHB11N50E, PHW11N50E PHP11N50E tp Single pulse t T 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 pulse width, tp (s) = f(t); parameter j-mb p PHP11N50E VGS = 4.8 V 4.6 V 4.4 V 4.2 V ...
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... Fig.11. Sub-threshold drain current f GS) Capacitances, Ciss, Coss, Crss (pF) 10000 1000 100 10 0.1 100 120 140 Fig.12. Typical capacitances f Product specification PHB11N50E, PHW11N50E max. typ. min. - 100 120 140 conditions 0.25 mA SUB-THRESHOLD CONDUCTION ...
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... G avalanche current (I Maximum Repetitive Avalanche Current, IAR (A) 100 10 1 0.1 0.01 1E-06 100 150 Fig.18. Maximum permissible repetitive avalanche ) current ( Product specification PHB11N50E, PHW11N50E PHP11N50E 150 0.4 0.6 0.8 1 1.2 Drain-Source Voltage, VSDS ( f(V ); parameter T F SDS j Tj prior to avalanche = 25 C 125 C tp ...
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... Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Epoxy meets UL94 V0 at 1/8". December 1998 10.3 max 11 max 15.4 0.85 max (x2) Fig.19. SOT404 : centre pin connected to mounting base. 11.5 9.0 2.0 3.8 5.08 Fig.20. SOT404 : soldering pattern for surface mounting . 7 Product specification PHB11N50E, PHW11N50E 4.5 max 1.4 max 2.5 0.5 17.5 Rev 1.000 ...
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... Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT429 envelope. 3. Epoxy meets UL94 V0 at 1/8". December 1998 PHB11N50E, PHW11N50E 5.3 max 16 max 1.8 5.3 7.3 seating 15.5 max plane 2 1.1 ...
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... Philips customers using or selling these products for use in such applications their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. December 1998 PHB11N50E, PHW11N50E 9 Product specification Rev 1.000 ...