MBM29LV160TE70TN Meet Spansion Inc., MBM29LV160TE70TN Datasheet - Page 22

• Manufacturer Part Number: MBM29LV160TE70TN
• Description: Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit
• Manufacturer: Meet Spansion Inc.

22
MBM29LV160TE
The automatic programming operation is completed when the data on DQ
bit at which time the device return to the read mode and addresses are no longer latched. (See “Hardware
Sequence Flags” Table.) Therefore, the device requires that a valid address be supplied by the system at this
time. Hence, Data Polling must be performed at the memory location which is being programmed.
Any commands written to the chip during this period will be ignored. If hardware reset occurs during the pro-
gramming operation, it is impossible to guarantee whether the data being written is correct or not.
Programming is allowed in any sequence and across sector boundaries. Beware that a data “0” cannot be
programmed back to a “1”. Attempting to do so may either hang up the device or result in an apparent success
according to the data polling algorithm but a read from read/reset mode will show that the data is still “0”. Only
erase operations can convert “0”s to “1”s.
“Embedded Program
typical command strings and bus operations.
• Chip Erase
Chip erase is a six-bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the chip erase command.
Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase
Algorithm command sequence the device will automatically program and verify the entire memory for an all zero
data pattern prior to electrical erase. (Preprogram Function.) The system is not required to provide any controls
or timings during these operations.
The automatic erase begins on the rising edge of the last WE pulse in the command sequence and terminates
when the data on DQ
(See “Chip/Sector Erase Operation Timing Diagram” in “■TIMING DIAGRAM”.)
“Embedded Erase
command strings and bus operations.
• Sector Erase
Sector erase is a six-bus cycle operation. There are two “unlock” write cycles, followed by writing the “set-up”
command. Two more “unlock” write cycles are then followed by the Sector Erase command. The sector address
(any address location within the desired sector) is latched on the falling edge of WE, while the command (Data =
30h) is latched on the rising edge of WE. After a time-out of “t
command, the sector erase operation will begin.
Multiple sectors may be erased concurrently by writing six-bus cycle operations on “MBM29LV160TE/BE Stan-
dard Command Definitions” Table in “■FLEXIBLE SECTOR-ERASE ARCHITECTURE”. This sequence is fol-
lowed with writes of the Sector Erase command to addresses in other sectors desired to be concurrently erased.
The time between writes must be less than “t
start. It is recommended that processor interrupts be disabled during this time to guarantee this condition. The
interrupts can be re-enabled after the last Sector Erase command is written. A time-out of “t
edge of the last WE will initiate the execution of the Sector Erase command(s). If another falling edge of the WE
occurs within the “t
window is still open. (See section DQ
Suspend during this time-out period will reset the device to the read mode, ignoring the previous command
string. Resetting the device once execution has begun will corrupt the data in the sector. In that case, restart
the erase on those sectors and allow them to complete. (Refer to the Write Operation Status section for Sector
Erase Timer operation.) Loading the sector erase buffer may be done in any sequence and with any number of
sectors (0 to 34).
Sector erase does not require the user to program the device prior to erase. The device automatically programs
all memory locations in the sector(s) to be erased prior to electrical erase (Preprogram Function). When erasing
a sector or sectors the remaining unselected sectors are not affected. The system is not required to provide any
controls or timings during these operations.
The automatic sector erase begins after the “t
sector erase command pulse and terminates when the data on DQ
at which time the device returns to the read mode. Data polling must be performed at an address within any of
TM
TOW
7
Algorithm” in “■FLOW CHART” illustrates the Embedded Erase
TM
is “1” (See Write Operation Status section.) at which time the device returns to read mode.
” time-out window the timer is reset. Monitor DQ
Algorithm” in “■FLOW CHART” illustrates the Embedded Program
70/90
Retired Product DS05-20883-7E_July 31, 2007
3
, Sector Erase Timer.) Any command other than Sector Erase or Erase
/MBM29LV160BE
TOW
TOW
” otherwise that command will not be accepted and erasure will
” time out from the rising edge of the WE pulse for the last
TOW
” from the rising edge of the last sector erase
7
is “1” (See Write Operation Status section)
3
to determine if the sector erase timer
7
is equivalent to data written to this
70/90
TM
Algorithm using typical
TOW
TM
Algorithm using
” from the rising