MCD212 Motorola, MCD212 Datasheet - Page 24

• Manufacturer Part Number: MCD212
• Description: Video Decoder and System Controller(with JTAG)
• Manufacturer: Motorola

The VDSC has an on–chip dynamic RAM (DRAM) controller. It supports several DRAM configurations
and performs DRAM arbitration, address multiplexing, timing generation, and refresh.
4.1
The DRAM types the VDSC can drive are 256K x 4, 1M x 4 and 256K x 16. They always form a
16–bit data bus. The devices can be configured in one or two banks. Six configurations are possible:
The TD (type of device) bit of the CSR1W register selects either 256K x 4, 256K x 16 (TD = 0), or
1M x 4 (TD = 1) DRAM type.
The selection between one or two banks is done by fixing the CAS1 and CAS2 pins to a logical level
during reset. CAS1 corresponds to bank 1 and CAS2 corresponds to bank 2. See Table 4–1 for the
address map of the DRAM banks. No DTACK is generated for addresses outside a certain configura-
tion.
MOTOROLA
4 Devices 256K x 4 (512K byte)
8 Devices 256K x 4 (1M byte)
4 Devices 1M x 4
8 Devices 1M x 4
1 Device 256K x16 (512K byte)
2 Devices 256K x16 (1M byte)
DRAM CONFIGURATION
(2M byte)
(4M byte)
MCD212
DRAM CONTROL
4
4–1