MCD212 Motorola, MCD212 Datasheet - Page 39
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MCD212
Manufacturer Part Number
MCD212
Description
Video Decoder and System Controller(with JTAG)
Manufacturer
Motorola
Datasheet
1.MCD212.pdf
(87 pages)
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5–10
5.4.4.1
Programmable via CH#1 and CH#2.
R7 – R2, G7 – G2, and B7 – B2 contain the color–data of one pixel. Only the 6 MSBs per byte are
implemented.
The CLUT RAM is addressable in two steps.
First, one of the four CLUT banks must be selected via the CLUT bank register (address A7, A6).
Second, the address within the bank is given by selecting a CLUT register h80 – hBF.
R7
23
R6
22
CLUT Color Register 0 - 63 (h80 - hBF)
R5
21
R4
20
Table 5–14. CLUT Color Register 0 – 63 — Address h80 – hBF
R3
19
R2
18
Channel
17
—
No.
1+2
1+2
1+2
—
—
—
—
1
1
1
1
2
1
2
1
2
1
1
1
1
1
2
1
2
16
—
Address (h)
G7
15
DD to FF
D0 to D7
80 to BF
Table 5–13. Register Map
CA
CB
CC
CD
CE
DA
DB
DC
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
CF
D8
D9
G6
14
G5
13
CLUT Color 0 – 63
Image Coding Method
Transparency Control
Plane Order
CLUT Bank
Transparent Color for Plane A
Reserved
Transparent Color for Plane B
Mask Color for Plane A
Reserved
Mask Color for Plane B
DYUV Abs. Start Value for Plane A
DYUV Abs. Start Value for Plane B
Reserved
Cursor Position
Cursor Control
Cursor Pattern
Region Control 0 – 7
Backdrop Color
Mosaic Pixel Hold for Plane A
Mosaic Pixel Hold for Plane B
Weight Factor for Plane A
Weight Factor for Plane B
Reserved
MCD212
G4
12
G3
11
Register Name
G2
10
—
9
—
8
B7
7
B6
6
B5
5
B4
4
B3
3
B2
2
MOTOROLA
—
1
—
0
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