STE100A ST Microelectronics, Inc., STE100A Datasheet - Page 27
STE100A
Manufacturer Part Number
STE100A
Description
PCI 10/100 Ethernet Controller with Integrated PHY (3.3v)
Manufacturer
ST Microelectronics, Inc.
Datasheet
1.STE100A.pdf
(82 pages)
- Current page: 27 of 82
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STE10/100A
3.6
3.7
3.7.1
3.7.2
LED display operation
The STE10/100A provides 2 LED display modes; the detailed descriptions of their operation
are described in the pin description section.
First mode – 3 LED displays
Second mode – 4 LED displays
Reset operation
Reset whole chip
There are two ways to reset the STE10/100A:
Reset transceiver only
When XRST (bit 15 of XR0) is set to 1, the transceiver will reset its circuits, will initialize its
registers to their default values, and clear XRST.
–
–
–
–
–
–
–
–
–
100Mbps (on) or 10Mbps (off)
Link (Remains on when link ok) or activity (Blinks at 10Hz when receiving or
transmitting collision-free)
FD (Remains on when in full duplex mode) or collision (Blinks at 20Hz when
collisions detected)
100 Link (On when 100M link ok)
10 Link (On when 10M link ok)
Activity (Blinks at 10Hz when receiving or transmitting)
FD (Remains on when in full duplex mode) or collision (Blinks at 20Hz when
collisions detected)
Hardware reset
Via RST# pin (to ensure proper reset operation, the RST# signal should be
asserted at least 100ms)
Software reset
Via SWR (bit 0 of CSR0) being set to 1 (the STE10/100A will reset all circuits
except the transceivers and configuration registers, set registers to their default
values, and will clear SWR) and set XRST(XR0, bit 15) to reset the transceivers.
Functional description
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