IDT82P2282 Integrated Device Technology, Inc., IDT82P2282 Datasheet - Page 179

• Manufacturer Part Number: IDT82P2282
• Description: 2 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2282
T1/J1 PRGD Status/Error Control (072H, 172H)
BERE:
INV:
SYNCV:
SYNCE:
T1/J1 PRGD Interrupt Indication (073H, 173H)
BERI:
SYNCI:
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
= 0: Disable the interrupt on the INT pin when the BERI bit (b3, T1/J1-073H,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when the BERI bit (b3, T1/J1-073H,...) is ‘1’.
= 0: No bit error is inserted to the generated pattern.
= 1: A single bit error is inserted to the generated pattern.
This bit is cleared after the single bit error insertion is completed.
= 0: The pattern is out of synchronization (the pattern detector has detected 10 or more bit errors in a fixed 48-bit window).
= 1: The pattern is in synchronization (the pattern detector has detected at least 48 consecutive error-free bit periods).
= 0: Disable the interrupt on the INT pin when the SYNCI bit (b0, T1/J1-073H,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when the SYNCI bit (b0, T1/J1-073H,...) is ‘1’.
= 0: No bit is mismatched with the PRGD pattern when the extracted data is in synchronization state.
= 1: At least one bit is mismatched with the PRGD pattern when the extracted data is in synchronization state.
This bit will be cleared if a ’1’ is written to it.
= 0: There is no status change on the SYNCV bit (b1, T1/J1-072H,...).
= 1: There is a transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the SYNCV bit (b1, T1/J1-072H,...).
This bit will be cleared if a ’1’ is written to it.
7
7
6
6
Reserved
Reserved
5
5
4
4
168
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
BERE
BERI
R/W
R
3
0
3
0
R/W
INV
2
0
2
Reserved
SYNCV
R
1
0
1
October 7, 2003
SYNCE
SYNCI
R/W
R
0
0
0
0