IDT82P2282 Integrated Device Technology, Inc., IDT82P2282 Datasheet - Page 367

• Manufacturer Part Number: IDT82P2282
• Description: 2 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2282
7.4
7.4.1
Physical And Electrical Specifications
The capacitive loading for timing measurement is:
100 pF for BUS: D[7:0],
50 pF for other pins.
The timing can be applied to both clock edges as defined by active clock edge selection.
Delays are measured according to the cross of 50% of the rising/falling edge.
The duty cycle for TSCKn/MTSCK & RSCKn/MRSCK is from 40% to 60%.
The system Input / Output timing in Non-Multiplexed mode is listed as below:
DIGITAL I/O TIMING CHARACTERISTICS
IN NON-MULTIPLEXED MODE
Note:
* The ‘-10’ applies to the case that the clock is input and the ‘0’ applies to the case that the clock is output.
Symbol
Tprop
Thold
Ts
Propagation Delay
Set Up Time
Parameter
Hold Time
TSCK
RSCK
Outputs
Inputs
Figure 42. I/O Timing in Non-Multiplexed Mode
-10 / 0 *
Min.
10
10
Ts
Tprop
Thold
356
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Typ.
Max
20
Unit
ns
ns
ns
October 7, 2003