IDT82P2282 Integrated Device Technology, Inc., IDT82P2282 Datasheet - Page 223

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IDT82P2282

Manufacturer Part Number
IDT82P2282
Description
2 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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IDT82P2282
T1/J1 RCRB Configuration (0D2H, 1D2H)
FREEZE:
DEB:
codewords of the same channel are identical.
SIGE:
SIGF:
and the signaling bits on Framer 12 & 24 are recognized as ‘B’. Only the signaling bits A & B are saved in the Extracted Signaling Data/Extract Enable
register. The C & D bits in the Extracted Signaling Data/Extract Enable register are not cared.
Extract Enable register.
Programming Information
Bit Name
Default
Bit No.
Type
= 0: Disable the manual signaling freezing.
= 1: Manually freeze the signaling data in the A,B,C,D bits (b3~0, T1/J1-ID-01~18H) as the previous valid value.
= 0: Disable the signaling de-bounce.
= 1: Enable the signaling de-bounce. That is, the A,B,C,D bits (b3~0, T1/J1-ID-01~18H) are updated only if 2 consecutive received AB/ABCD
= 0: Disable the interrupt on the INT pin when any of the COSI bits (T1/J1-0D8H,... & T1/J1-0D7H,... & T1/J1-0D6H,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when any of the COSI bits (T1/J1-0D8H,... & T1/J1-0D7H,... & T1/J1-0D6H,...) is ‘1’.
This bit is valid only in the ESF and SLC-96 format.
= 0: The extracted signaling bits are in 4 states signaling, i.e., the signaling bits on Framer 6 & 18 of a signaling multi-frame are recognized as ‘A’
= 1: The extracted signaling bits are in 16 states signaling, i.e., four signaling bits A, B, C & D are all saved in the Extracted Signaling Data/
7
6
Reserved
5
4
212
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
FREEZE
R/W
3
0
DEB
R/W
2
0
SIGE
R/W
1
0
October 7, 2003
SIGF
R/W
0
1

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