HFC-U Cologne Chip AG, HFC-U Datasheet - Page 14

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HFC-U

Manufacturer Part Number
HFC-U
Description
Isdn HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet
Then the additional 2 bits of the new I/O address have to be written into the higher address (SA0 = 1)
of the hardware selected I/O address. The other 6 bits in the byte must have a special pattern to switch
over to the software selected address mode. This pattern must be 0101 01 aa, whereby aa are the 2
higher address bits.
e.g.: wanted I/O address: 3A4h / 3A5h
IIOSEL(3:0): 0001
then hardware selected I/O address is:
write the value A4h or A5h into 2E0h
write the value 57h into 2E1h
x = don't care
All further accesses to the HFC-U can only be done on the addresses 3A4h / 3A5h. Only a master
reset on the RESET pin will switch back the HFC-U into hardware selected address mode.
3.1.2 ISA-PC bus interface
The HFC-U only uses 2 I/O addresses with SA0 switches between data or control information in
ISA-PC mode. As normal only 10 bits of the ISA-PC bus address are used for I/O address selection.
March 1997
It's useful to solve a possible address conflict by programming the I/O address as early as
possible. It is recommendable to set the address with a simple .SYS driver in a DOS
environment.
X = don't care
ALE must be connected to GND and at least one of the IIOSEL0-3 must be '1' or open!
SA0
X
X
hint:
important!
0
0
1
1
/IOR
X
1
0
1
0
1
/IOW
X
1
1
0
1
0
/AEN
X
1
0
0
0
0
2E0h
= 1010 010x
= 0101 01
0101 0111
no access
no access
read data
write data
read status
write control
Operation
=
11
10 1110 0000 b
b
b
b
b
pattern
address
HFC-U
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