HFC-U Cologne Chip AG, HFC-U Datasheet - Page 37

• Manufacturer Part Number: HFC-U
• Description: Isdn HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

6
6.1
Timing Diagram 1: ISA-PC bus or processor access
March 1997
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
RDD
RDDH
SA
SAH
RD
WR
WRDSU
WRDH
RDY
RDYH
BUSRD
Timing characteristics
ISA-PC bus or processor access
/IOR Low to Read Data Out Time
/IOR High to Data Buffer Turn Off Time
Address to /IOR or /IOW Low Setup Time
Address Hold Time after /IOR or /IOW High
Read Time
Write Time
Write Data Setup Time to /IOW Low
Write Data Hold Time from /IOW High
Delay Time from /IOR or /IOW Low to IOCHRDY Low
Delay Time from /IOR Low or /IOW High to IOCHRDY High
Delay Time from /IOR Low to BUSDIR Low
CHARACTERISTICS
2 x t
2 x t
MIN.
20ns
20ns
25ns
10ns
3ns
2ns
3ns
3ns
3ns
CLK
CLK
MAX.
HFC-U
25ns
15ns
30ns
30ns
25ns
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