HFC-U Cologne Chip AG, HFC-U Datasheet - Page 28

• Manufacturer Part Number: HFC-U
• Description: Isdn HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

4
4.1
Timeslots for transmit direction
March 1997
Name
B1_SL
B2_SL
C/I
TRxR
B1_D
B2_D
MON1_D (2Ah)
MON2_D (2Bh)
Register bit description
Register bit description of GCI/IOM bus section
Addr.
(20h)
(21h)
(22h)
(23h)
(28h)
(29h)
Bits
5..0
6
7
3..0
7..4
0
1
6
7
0..7
0..7
0..7
0..7
r/w
w
w
w
r/w
r
r/w
r/w
r/w
r/w
Function
unused
select ST bus data lines
'0'
'1'
transmit channel enable for ST bus
'0'
'1'
see B1_SL
on read: indication
on write: command
unused
'1'
'1'
data on input pin IN0
data on input pin IN1
read/write register for B1 timeslot data
read/write register for B2 timeslot data
1st monitor data byte
2nd monitor data byte
GCI_IN is input
GCI_OUT is output
GCI_OUT is input
GCI_IN is output
disable (default)
enable
Monitor receiver ready (2 bytes received)
bit is reset after read of second Monitor byte
(MON2_D)
Monitor transmitter ready
write on MON2_D starts transmit and resets this bit
HFC-U
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