AD1845 Analog Devices, AD1845 Datasheet - Page 32

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AD1845

Manufacturer Part Number
AD1845
Description
Parallel-port 16-Bit Soundport Stereo Codec
Manufacturer
Analog Devices
Datasheet

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AD1845
ADVANCED POWER-DOWN MODES
The AD1845 has eight Advanced Power-Down Modes available
at any time. The user can control these power-down modes
through hardware by asserting the PWRDWN and RESET pins
or through software by writing to the Power-Down and the To-
tal Power-Down Control Registers. Figure 24 summarizes the
power-down delay, power-up delay, and power dissipation for
each power down mode. A priority listing and description of
the power-down modes follows. Note that the hardware con-
trolled Power-Down and Reset modes take precedence over the
software controlled power-down states.
Hardware Controlled States
The hardware power-down states are accessed by bringing the
PWRDWN or RESET pin LO. Either of these signals place the
AD1845 into the maximum power conservation mode. Bringing
the PWRDWN or RESET pin HI will power-up the codec in
approximately 512 ms (see the Power-Up and Reset section of
this data sheet).
• Power-Down: PWRDWN immediately puts the AD1845 into
• Reset: RESET powers down the AD1845 gradually to its
Software Controlled States
To enter the Total Power-Down mode requires entering the
Mode Change Enable (MCE) state. After entering MCE, the
Total Power-Down mode can be accessed by writing a “1” to
the TOTPWD bit in the Total Power-Down Register. Exiting
the Total Power-Down mode (writing a “0” to the TOTPWD
bit in the Total Power-Down Register) will initialize the
AD1845 in approximately 512 ms (see the Power-Up and Reset
section of this data sheet).
• Total Power-Down: In the Total Power-Down mode the
Advanced
Power-Down
Mode
Operating
1. Power-Down
2. Reset
3. Total Power-Down
4. Standby
5. Mixer Power-Down HI
6. Mixer Only
7. ADC Power-Down
8. DAC Power-Down
“x” = Don’t Care
*Values shown are derived using a 24.576 MHz input clock source.
All values are proportional to the input clock source.
its lowest power-down state. The AD1845’s parallel inter-
face will not function and all bidirectional signal lines will be
in a high-impedance state.
lowest power-down state. The AD1845 performs a se-
quenced power-down that eliminates audible effects from the
DAC’s output. The XTAL1 input must be clocked for the
minimum duration of the RESET pulse width. The
AD1845’s parallel interface will not function and all bidirec-
tional signal lines will be in a high-impedance state.
ADC, DAC, Mixer, and voltage reference are turned off,
but the digital interface remains active awaiting power-up.
All ADC and DAC data is flushed including data in the cap-
ture and playback FIFOs.
PWRDWN
Pin
HI
LO
HI
HI
HI
HI
HI
HI
RESET
Pin
HI
x
LO
HI
HI
HI
HI
HI
HI
Figure 24. Advanced Power-Down Mode Summary
TOTPWD ADCPWD DACPWD MIXPWD Power-Down
Bit
0
x
x
1
0
0
0
0
0
Bit
0
x
x
x
1
0
1
1
0
–32–
Bit
0
x
x
x
x
x
1
0
1
To enter the software controlled power-down states in the
Power-Down Control Register, write a “1” to the control bits.
The AD1845 performs a sequenced power-down that eliminates
audible effects from the DAC’s output, and saves the codec’s in-
ternal operating state. Clearing the bits (writing a “0” to the
control bits) returns the AD1845 from the power-down state
and begins the initialization sequence. The AD1845 exits the
power-down mode within 1 sample period. However, an
additional 128 sample periods are required to unmute the out-
puts and restore the internal settings to the pre-Power-Down
operating state.
• Standby: Entering the Standby mode powers down the ADC,
• Mixer Power-Down: Entering the Mixer Power-Down mode,
• Mixer Only: The Mixer Only mode is initiated by powering
• ADC Power-Down: Entering the ADC Power-Down mode,
• DAC Power-Down: Entering the DAC Power-Down mode
DAC and the Mixer, and forces all outputs to be muted.
Standby turns off all internal digital and analog circuitry with
the exception of the digital interface and the voltage refer-
ence. All ADC and DAC data is flushed including data in
the capture and playback FIFOs.
causes both the mixer and the DAC circuitry to be turned
off. All DAC data is flushed including data in the playback
FIFO. In this mode the mixer is off and the AD1845 is
muted, but the ADC remains functional.
down both the ADC and DAC, leaving the analog mixer and
the digital interface active. MIC, LINE, AUX1, AUX2, and
M_IN can be mixed in the analog domain on the AD1845
outputs. All ADC and DAC data is flushed including data in
the capture and playback FIFOs.
causes the ADC digital and analog engines to be turned off.
All ADC data is flushed including data in the capture FIFO
and the AD1845 is rendered deaf. The input programmable
gain amplifier (PGA) is also shut down. The DAC and
mixer remain active allowing the AD1845 to continue to
playback and mix samples.
suspends the DAC digital and analog engines, and all DAC
data is flushed including data in the playback FIFO. How-
ever, the mixer and ADC are functional allowing the
AD1845 to continue to capture and mix samples.
Bit
0
x
x
x
1
1
0
0
0
Delay*
x
0 s
3 ms
3 ms
1/F
1/F
1/F
1/F
1/F
S
S
S
S
S
Power-Up
Delay*
x
512 ms
512 ms
512 ms
1/F
1/F
1/F
1/F
1/F
S
S
S
S
S
Power
Dissipation
600 mW
150 mW
180 mW
350 mW
260 mW
400 mW
425 mW
10 mW
10 mW
REV. B

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