nRF24LE1 Nordic VLSI, nRF24LE1 Datasheet - Page 163

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nRF24LE1

Manufacturer Part Number
nRF24LE1
Description
Manufacturer
Nordic VLSI
Datasheet

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nRF24LE1 Preliminary Product Specification
The ADCCON3 register contains 3 overflow bits; uflow is set when the ADC is under ranged, oflow is set
when the ADC is over ranged, while range is the logical OR of uflow and oflow .
21.3.7
The analog input pin draws a small current transient each time the internal sampling capacitor is switched
to the input at the beginning of the acquisition phase. It is important that the circuitry driving the input set-
tles from this disturbance before the conversion is started. Unless the input is driven by a sufficiently fast
op-amp, it may be necessary to choose a longer than minimum acquisition time to ensure proper settling.
But note that this extends the conversion time accordingly, and hence the time delay before the ADC
returns to power-down mode. If current consumption is important, the acquisition time should be made as
short as possible.
Figure 71.
assuming a passive signal source and 10-bit conversions. If for instance the source resistance is 100k Ω
and the off-chip capacitance on the analog input pin is 10pF, it can be read out from the figure that the rec-
ommended acquisition time is 12µs.
Alternatively, a large capacitor may be connected between the analog input pin and VSS. It will supply all
the current to the sampling capacitor, so that minimum acquisition time can be used even if the source
resistance is high. A capacitor value of 33nF or higher is recommended.
Revision 1.1
Figure 71. Recommended acquisition time versus source resistance and capacitance (10-bit conversions)
gives recommendations for acquisition time as a function of source resistance and capacitance,
1.0E+06
1.0E+05
1.0E+04
1.0E+03
1.0E+02
Driving the analog input
1.0E-12
12us
1.0E-11
Capacitance [Far ads]
1.0E-10
163 of 191
1.0E-09
1.0E-08
Ex ternal buffer needed
Tac q=36us
Tac q=12us
Tac q=3us
Tac q=0.75us

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