nRF24LE1 Nordic VLSI, nRF24LE1 Datasheet - Page 72

• Manufacturer Part Number: nRF24LE1
• Manufacturer: Nordic VLSI

nRF24LE1 Preliminary Product Specification
DSYS - Device System parameters
This InfoPage area is used by the nRF24LE1 to store core data like tuning parameters. Erasing and/or
changing this area will cause severe changes to device behavior!
The operations that can affect this area are SPI commands ERASE ALL, ERASE PAGE and PROGRAM
operations to any of these flash addresses with the bit INFEN in register FSR set to logic 1.
If you are going to utilise the ERASE ALL SPI command the content of this InfoPage area must be read
out, stored and written back into nRF24LE1 after the ERASE ALL command finishes.
NUPP - Number of Unprotected Pages
The flash area can be split into a unprotected and a protected area. Protecting an area of the flash with this
feature means that the area is read only for the MCU, but it can still be read, erased and written by the SPI
interface. The feature protects a part of the code space against illegal erase/write operations from the
MCU. The protected area can typically be used for firmware upgrade functions (see 6.3.5 on page 80)
The code space area of the flash main block is divided into 32 pages each 512 bytes big. Leaving this byte
unchanged (NUPP=0xFF) will leave all the 32 pages of the code space unprotected, i.e the MCU can
erase and write to any section of it. If a number <32 is put in NUPP, the code space of the flash main block
will be split in a number of unprotected (= NUPP) and protected pages (31-NUPP). The number put in
NUPP is the page number of the first protected page. Ex: NUPP=12 gives 12 unprotected pages (0-11)
and 20 protected pages (12-31). Please see
If you have split the flash main block in 2, the value of the STP bit in the FSR register will decide where the
MCU starts code execution from. In the normal case STP is logic 0 and the code execution will start at
code space address 0x0000. If STP is set to logic 1 the code execution will start from the start of the pro-
tected area. The STP bit is set during the reset/start up sequence and will be set to logic 1 if there are an
odd number of ones in the 16 topmost addresses of the flash data memory. Please see
Revision 1.1
Enable HW debug
Reserved
a.
InfoPage data
NOTE:
of this area WILL cause changes to device behavior and performance.
This InfoPage area is used to store nRF24LE1 system and tuning parameters. Erasing the content
ENDE-
Name
BUG
-
486 bytes
1 byte
Size
Table 30. InfoPage content
Figure 32.
72 of 191
Address
0x24
0x25
Enable on chip HW debug features and JTAG
interface.
Byte value:
Reserved, must be 0xFF
•
•
0xFF: HW debug features disabled
other value: HW debug features and
JTAG interface enabled
Comment
Figure 32.