MT58L64L36D Micron Semiconductor, MT58L64L36D Datasheet - Page 13
MT58L64L36D
Manufacturer Part Number
MT58L64L36D
Description
(MT58LxxxLxxD) 2Mb SRAM
Manufacturer
Micron Semiconductor
Datasheet
1.MT58L64L36D.pdf
(19 pages)
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NOT RECOMENDED FOR NEW DESIGNS
AC TEST CONDITIONS
LOAD DERATING CURVES
SyncBurst SRAM timing is dependent upon the capaci-
tive loading on the outputs.
voltage curves.
2Mb: 128K x 18, 64K x 32/36 Pipelined, DCD SyncBurst SRAM
MT58L128L18D_C.p65 – Rev. C, Pub. 11/02
Input pulse levels ................. V
Input rise and fall times ..................................... 1ns
Input timing reference levels ..................... V
Output reference levels ............................ V
Output load ............................. See Figures 1 and 2
The Micron 128K x 18, 64K x 32, and 64K x 36
Consult the factory for copies of I/O current versus
.................... V
IH
IL
= (V
= (V
DD
DD
/2.2) + 1.5V
/2.2) - 1.5V
DD
DD
Q/2.2
/2.2
13
PIPELINED, DCD SYNCBURST SRAM
2Mb: 128K x 18, 64K x 32/36
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Output Load Equivalents
Q
Q
351
Z = 50Ω
O
Figure 1
Figure 2
+3.3V
V = 1.5V
T
317
5pF
50Ω
©2002, Micron Technology, Inc.