MT90883 Zarlink Semiconductor, MT90883 Datasheet - Page 31

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MT90883

Manufacturer Part Number
MT90883
Description
(MT90880 - MT90883) TDM to Packet Processors
Manufacturer
Zarlink Semiconductor
Datasheet
Packet Interface to WAN Access Interface
Incoming data is received by the MAC, and its destination address is checked. Packets intended for this device
are passed to the packet receive block for placing in external memory, while the header is classified to
determine the appropriate destination. A pointer to the packet is passed to the queue manager to be placed on
the correct queue as indicated by the classification result. The WAN Transmit block retrieves the data from
packet memory, and directs it towards the appropriate timeslots on the WAN interface.
Local TDM
Interface
Figure 12 - Packet to WAN Data Flow
Zarlink Semiconductor Inc.
MT90880/1/2/3
Packet Memory
Host Interface
31
Data Flow
Control Flow
Data Sheet

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