MT90883 Zarlink Semiconductor, MT90883 Datasheet - Page 63

• Manufacturer Part Number: MT90883
• Description: (MT90880 - MT90883) TDM to Packet Processors
• Manufacturer: Zarlink Semiconductor

Fields from Packet Engine Control Register:
6.9
The Memory Management Unit handles all access to the external packet memory, arbitrating between the
different modules requiring access. Efficient use of external memory is maintained by allocating memory in
small blocks or “granules”.
Features include:
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Identification
Flags
Fragment Offset
Time to Live (TTL)
Protocol
Header Checksum
Source IP address
Destination IP address
Remainder of the header
CPU_SEL4
CPU_PRI4
Byte offset to Context Descriptor
Interfaces to industry standard PBSRAM and ZBT SSRAM
Operates at 66 MHz
32 bit wide data path
Supports one to four equal sized memory banks
Supports a total of between 0.125 and 8 Mbytes of memory
Control Register Field
Memory Management Unit
Protocol Field
Table 27 - Pattern Matching for Example Traffic Class 4 (continued)
Table 28 - Control Register Fields for Example Traffic Class 4
Mask
Mask
Mask
Mask
Allow Match
Mask
Mask
Allow Match
Mask
set to 0b1
set to 0b11
Don't care
Mask
Zarlink Semiconductor Inc.
MT90880/1/2/3
Value
0d6 (TCP)
Check the packet has the right IP address for CPU
control traffic.
63
Match / Comment
Not TDM traffic
Send packets to the CPU.
Send to queue 3.
Comment
Data Sheet