MT90883 Zarlink Semiconductor, MT90883 Datasheet - Page 62

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MT90883

Manufacturer Part Number
MT90883
Description
(MT90880 - MT90883) TDM to Packet Processors
Manufacturer
Zarlink Semiconductor
Datasheet
Fields from Packet Engine Control Register:
Traffic Class 4: Ethernet - IPv4 - TCP - xxx
Configure the mask and match registers in the packet engine to control traffic to the CPU.
Flags
Fragment Offset
Time to Live (TTL)
Protocol
Header Checksum
Source IP address
Destination IP address
Remainder of the header
CPU_SEL3
CPU_PRI3
Byte offset to Context Descriptor
Ethernet
Destination MAC address
Source MAC address
Length / Type field
IPv4
Version
Internet Header Length (IHL)
Type of Service (TOS)
Total Length
Control Register Field
Protocol Field
Protocol Field
Table 25 - Pattern Matching for Example Traffic Class 3 (continued)
Table 27 - Pattern Matching for Example Traffic Class 4
Table 26 - Control Register Fields for Example Traffic Class 3
Mask
Mask
Mask
Mask
Mask
Mask
Allow Match
Mask
Mask
Mask
Allow match
Allow match
Allow match
Mask
Mask
set to 0b1
set to 0b10
Don't care
Mask
Mask
Zarlink Semiconductor Inc.
MT90880/1/2/3
Value
Check the packet has the right IP address for external DSP
traffic.
If the MAC is programmed into promiscuous mode then
the destination MAC address must be matched,
0x0800 (IP)
0b0100
0d20
62
Match / Comment
Match / Comment
Send to queue 2.
Not TDM traffic
Send packets to the CPU.
Comment
Data Sheet

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