AD607 Analog Devices, AD607 Datasheet - Page 15

• Manufacturer Part Number: AD607
• Description: Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem
• Manufacturer: Analog Devices

REV. 0
The IF’s small-signal bandwidth is approximately 45 MHz from
IFHI and IFLO through IFOP. The peak output at IFOP is
2.7 V. This allows some headroom at the demodulator inputs
(pin DMIP), which accept a maximum input of 150 mV for
IFs > 3 MHz and 75 mV for IFs 3 MHz (at IFs
the drive to the demodulators must be reduced to avoid saturat-
ing the output amplifiers with higher order mixing products that
are no longer removed by the onboard low-pass filters).
If the internal AGC detector is used, the IF output will be at an
amplitude of V
mV level requires the insertion of 6 dB of post-IF filter loss be-
tween IFOP and DMIP to avoid overloading the demodulators;
often, a simple RC low-pass filter with its corner frequency at
the IF will suffice.
Since there is no band-limiting in the IF strip, the output-
referred noise can be quite high; in a typical application and at a
gain of 75 dB it is about 100 mV rms, making post-IF filtering
desirable. IFOP may be also used as an IF output for driving an
A/D converter, external demodulator, or external AGC detector.
Figure 37 shows methods of matching the optional second IF
filter.
Gain Scaling and RSSI
The AD607’s overall gain, expressed in decibels, is linear-in-dB
with respect to the AGC voltage V
gain of all sections is maximum when V
progressively up to V
limit V
AD607 features temperature-compensation of the gain scaling.
Note that GAIN/RSSI pin is either an MGC input, when the
gain is controlled by some external means, or an RSSI output,
when the internal AGC detector is used.
560 mV at V
b. Biasing DMIP from VMID (Assumes BPF AC Coupled
Internally)
Figure 37. Input and Output Matching of the Optional
Second IF Filter
a. Biasing DMIP from Power Supply (Assumes BPF AC
Coupled Internally)
P
– 0.8 V). The gain of all stages changes in parallel. The
P
P
= 3 V and 400 mV at the minimum V
/10, that is, 300 mV for V
AD607
AD607
G
DMIP
IFOP
= 2.2 V (for V
DMIP
VMID
IFOP
R
T
R
T
G
C
BYPASS
at pin GAIN/RSSI. The
BPF
P
BPF
= 3 V; in general, up to a
G
is zero, and reduces
R
VPOS
P
T
= 3 V. This 300
2R
2R
T
T
3 MHz,
P
of
–15–
The gain control scaling is proportional to the reference voltage
applied to the pin GREF. When this pin is tied to the midpoint
of the supply (VMID), the scale is nominally 20 mV/dB (50 dB/
V) for V
gain range (mixer plus IF) corresponds to a control voltage of
0.4 V
pends on the insertion losses of the IF filters used. More gener-
ally, the gain scaling using these connections is V
per dB), so becomes 33.3 mV/dB (30 dB/V) using a 5 V supply,
with a proportional change in the AGC range, to 0.33 V
V
for power supply voltages from 2.7 V to 5.5 V.
Alternatively, pin GREF can be tied to an external voltage
reference, V
or AD1580 (1.21 V) voltage reference, to provide supply-
independent gain scaling of V
the Analog Devices’ AD7013 and AD7015 baseband converters,
the external reference may also be provided by the reference
output of the baseband converter (Figure 38). For example, the
AD7015 baseband converter provides a V
connected to GREF the gain scaling is 16.4 mV/dB (60 dB/V).
An auxiliary DAC in the AD7015 can be used to generate the
MGC voltage. Since it uses the same reference voltage, the nu-
merical input to this DAC provides an accurate RSSI value in
digital form, no longer requiring the reference voltage to have
high absolute accuracy.
Figure 38. Interfacing the AD607 to the AD7013 or AD7015
Baseband Converters
I/Q Demodulators
Both demodulators (I and Q) receive their inputs at pin DMIP.
Internally, this single-sided input is actually differential; the
noninverting input is referenced to pin VMID. Each demodula-
tor comprises a full-wave synchronous detector followed by a
2 MHz, two-pole low-pass filter, producing single-sided outputs
at pins IOUT and QOT. Using the I and Q demodulators for
IFs above 12 MHz is precluded by the 400 kHz to 12 MHz
response of the PLL used in the demodulator section. Pin DMIP
requires an external bias source at V
gested methods.
Outputs IOUT and QOUT are centered at V
up to 1.23 V even at the low supply voltage of 2.7 V. They
can therefore directly drive the RX ADCs in the AD7015
baseband converter, which require an amplitude of 1.23 V to
fully load them when driven by a single-sided signal. The con-
version gain of the I and Q demodulators is 18 dB (X8), requir-
ing a maximum input amplitude at DMIP of 150 mV for IFs >
3 MHz.
G
3 V, Table II lists gain control voltages and scale factors
V
P
= 3 V. Under these conditions, the lower 80 dB of
G
AD607
R
GAIN/RSSI
, provided, for example, by an AD1582 (2.5 V)
2.0 V. The final centering of this 1.6 V range de-
QOUT
GREF
VMID
IOUT
R
R
10nF
R
/75 (volts per dB). When using
C
1nF
P
/2; Figure 39 shows sug-
C
R
IADC
QADC
IADC
QADC
REFOUT
BYPASS
AUX DAC
of 1.23 V; when
AD7013 OR
AD7015
P
/2 and can swing
(AD7015)
(AD7013)
P
AD607
/150 (volts