AD607 Analog Devices, AD607 Datasheet - Page 22

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AD607

Manufacturer Part Number
AD607
Description
Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem
Manufacturer
Analog Devices
Datasheet

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AD607
In operation (Figure 48), the AD607 evaluation board draws
about 8.5 mA at midgain (59 dB). Use high impedance probes
to monitor signals from the demodulated I and Q outputs and
the IF output. The MGC voltage should be set such that the
signal level at DMIP does not exceed 150 mV; signal levels
above this will overload the I and Q demodulators. The inser-
tion loss between IFOP and DMIP is typically 3 dB if a simple
low-pass filter (R8 and C2) is used and higher if a reverse-
terminated bandpass filter is used.
SIGNAL GENERATOR
SIGNAL GENERATOR
SYNTHESIZED
SYNTHESIZED
FLUKE 6082A
240.02 MHz
HP 8656A
240 MHz
IEEE CONTROLLER
COMBINER
ZFSC–2–1
DISK DRIVE
HP 9920
HP9121
Figure 48. Evaluation Board Test Setup
MCL
PROGRAMMABLE
POWER SUPPLY
HP 6632A
2.7V–6V
SIGNAL GENERATOR
RF
SYNTHESIZED
–22–
229.3 MHz
HP 8656A
LO
EVALUATION
If the AD607’s internal AGC detector is used, then the GAIN/
RSSI (Pin 12) becomes an output and the RSSI voltage appears
across C12, which serves as an integrating capacitor. This volt-
age must be monitored by a high impedance (100 k minimum)
probe. The internal AGC loop holds the IF voltage at IFOP
(Pin 14) at 300 mV; in this application, about 6 dB of attenua-
tion is needed between pins IFOP and DMIP to avoid overload-
ing the I and Q demodulators.
VPOS
BOARD
AD607
SIGNAL GENERATOR
MGC
SYNTHESIZED
FDIN
10.710 MHz
Q OUTPUT
I OUTPUT
HP 3326
VOLTAGE SOURCE
PROGRAMMABLE
DATA PRECISION
DVC8200
OSCILLOSCOPE
TEKTRONIX
WITH 11A32
PLUGIN
IEEE –488 BUS
11402A
REV. 0

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