ST7571 Sitronix Technology, ST7571 Datasheet - Page 10

• Manufacturer Part Number: ST7571
• Description: 4 Gray Scale Dot Matrix LCD Controller/Driver
• Manufacturer: Sitronix Technology

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ST7571
6. PIN DESCRIPTION
6.1 POWER SUPPLY
Power Supply Pin Description
6.2 LCD DRIVER SUPPLY
LCD Driver Supply Pin Description
Ver 1.5a
Name
Name
VDD1
VDD2
VDD3
XV0O
VSS1
VSS2
VSS3
XV0S
VMO
XV0I
VGO
VGS
V0O
V0S
VGI
V0I
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
I/O
I/O
Power supply for digital circuit.
If VDD1 is the same level as VDD2, they can be connected together by FPC.
Power supply for analog circuit (booster).
Power supply for sensitive circuit (internal Vref regulator).
VDD3 is the same level as VDD2, and they should be connected together by FPC.
Ground for digital circuit. VSS1, VSS2 & VSS3 should be connected together by FPC.
Ground for analog circuit (booster), it should be connected together by FPC.
Ground for sensitive circuit (Vref regulator), it should be connected together by FPC.
V0 is the LCD driving voltage for common circuits at negative frame.
V0O is the output of V0 regulator. V0S is the feedback of V0 regulator.
V0I is the V0 input of common circuits.
Be sure that: V0 ≥ VG > VM > VSS ≥ XV0 (under operation).
V0O, V0I & V0S should be connected together by FPC.
XV0 is the LCD driving voltage for common circuits at positive frame.
XV0O is the output of XV0 regulator. XV0S is the feedback of XV0 regulator.
XV0I is the XV0 input of common circuits.
XV0O, XV0I & XV0S should be connected together by FPC.
VG is the LCD driving voltage for segment circuits.
A storage capacitor on FPC or system for VG is required.
VGO is the output of VG regulator. VGS is the feedback of VG regulator.
VGI is the VG input of segment circuits.
VGO, VGI & VGS should be connected together by FPC.
Be aware that: 1.8V ≤ VG < VDD2.
VMO is the output of VM, which is the LCD driving voltage for common circuits.
A storage capacitor on FPC or system for VM is required.
Be aware that: 0.7V < VM < VDD2.
When the internal power circuit is active, the VG and VM are generated according to the bias
setting as shown below:
NOTE: N = 5 to 12
LCD bias
1/N bias
(2/N) x V0
VG
10/76
Description
Description
(1/N) x V0
VM
2009/7/21