ST7571 Sitronix Technology, ST7571 Datasheet - Page 20

• Manufacturer Part Number: ST7571
• Description: 4 Gray Scale Dot Matrix LCD Controller/Driver
• Manufacturer: Sitronix Technology

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ST7571
The sequence is initiated with a START condition (S) from the I
All slaves with the corresponding address acknowledge in parallel, all the others will ignore the I
acknowledgement, one or more command words are followed and define the status of the addressed slaves. A command
word consists of a control byte, which defines Co and A0, and a data byte.
The last control byte is tagged with a cleared most significant bit (i.e. the continuation bit Co). After a control byte with a
cleared Co bit, only data byte(s) will follow. The state of the A0 bit defines whether the following data bytes are interpreted
as commands or as RAM data. All addressed slaves on the bus also acknowledge the control and data bytes. After the last
control byte either a series of display data bytes or command data bytes may follow (depending on the A0 bit setting).
If the A0 bit of the last control byte is set to logic 1, these data bytes (display data bytes) will be stored in the display RAM at
the address specified by the internal data pointer. The data pointer is automatically updated and the data is directed to the
intended ST7571 device.
If the A0 bit of the last control byte is set to logic 0, these data bytes (command data byte) will be decoded and the setting of
ST7571 will be changed according to the received commands.
Only the addressed slave makes the acknowledgement after each byte. At the end of the transmission the bus master
issues a STOP condition (P). If no acknowledge is generated by the master after a byte, the driver stops transferring data to
the master.
Ver 1.5a
Co
0
1
Last control byte. Only a stream of data bytes is allowed to follow.
This stream may only be terminated by a STOP or RE-START condition.
Another control byte will follow the data byte.
Fig 9. I
2
C Interface protocol
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2
C Interface master, which is followed by the slave address.
2
C Interface transfer. After
2009/7/21