IDT82V2044E Integrated Device Technology, IDT82V2044E Datasheet - Page 47
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IDT82V2044E
Manufacturer Part Number
IDT82V2044E
Description
4 Channel T1/j1/e1 Short Haul Liu
Manufacturer
Integrated Device Technology
Datasheet
1.IDT82V2044E.pdf
(73 pages)
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QUAD CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
4.2.7
Table-45 STAT0: Line Status Register 0 (real time status monitor)
TCLK_LOS
IBLBD_S
IBLBA_S
PRBS_S
Symbol
DF_S
LINE STATUS REGISTERS
-
(R, Address = 14H,54H,94H,D4H)
Bit
6
5
4
7
3
2
Default
0
0
0
0
0
-
Inband Loopback deactivate code receive status indication
Synchronous status indication of PRBS/QRSS (real time)
Reserved
Inband Loopback activate code receive status indication
= 0: no Inband Loopback activate code is detected
= 1: activate code has been detected for more than t ms. Even there is bit error, this bit remains set as long as the
bit error rate is less than 10
Note1:
Automatic remote loopback switching is disabled (ARLP = 0), t = 40 ms. If automatic remote loopback switching is
enabled (ARLP = 1), t = 5.1 s. The rising edge of this bit activates the remote loopback operation in local end.
Note2:
If IBLBA_IM=0 and IBLBA_IES=0, a ‘0’ to ‘1’ transition on this bit will cause an activate code detect interrupt.
If IBLBA_IM=0 and IBLBA_IES=1, any changes on this bit will cause an activate code detect interrupt.
= 0: no Inband Loopback deactivate code is detected
= 1: the Inband Loopback deactivate code has been detected for more than t. Even there is a bit error, this bit
remains set as long as the bit error rate is less than 10
Note1:
Automatic remote loopback switching is disabled (ARLP = 0), t = 40 ms.If automatic remote loopback switching is
enabled (ARLP = 1), t= 5.1 s. The rising edge of this bit disables the remote loopback operation.
Note2:
If IBLBD_IM=0 and IBLBD_IES=0, a ‘0’ to ‘1’ transition on this bit will cause a deactivate code detect interrupt.
If IBLBD_IM=0 and IBLBD_IES=1, any changes on this bit will cause a deactivate code detect interrupt.
= 0: 2
= 1: 2
Note:
If PRBS_IM=0 and PRBS_IES=0, a ‘0’ to ‘1’ transition on this bit will cause a synchronous status detect interrupt.
If PRBS_IM=0 and PRBS_IES=1, any changes on this bit will cause a synchronous status detect interrupt.
TCLKn loss indication
= 0: normal
= 1: TCLKn pin has not toggled for more than 70 MCLK cycles.
Note:
If TCLK_IM=0 and TCLK_IES=0, a ‘0’ to ‘1’ transition on this bit will cause an interrupt.
If TCLK_IM=0 and TCLK_IES=1, any changes on this bit will cause an interrupt.
Line driver status indication
= 0: normal operation
= 1: line driver short circuit is detected.
Note:
If DF_IM=0 and DF_IES=0, a ‘0’ to ‘1’ transition on this bit will cause an interrupt.
If DF_IM=0 and DF_IES=1, any changes on this bit will cause an interrupt.
15
15
-1 (E1) PRBS or 2
-1 (E1) PRBS or 2
20
20
-2
-1 (T1/J1) QRSS is not detected
-1 (T1/J1) QRSS is detected.
.
47
Description
-2
.
TEMPERATURE RANGES
INDUSTRIAL