FLLXT971A Intel, FLLXT971A Datasheet - Page 39

• Manufacturer Part Number: FLLXT971A
• Description: 3.3V Dual Speed Fast Ethernet PHY Transceicer
• Manufacturer: Intel

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Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Figure 20. Protocol Sublayers
In the receive direction, the PCS layer performs the opposite function, substituting two preamble
nibbles for the SSD.
3.7.3.1.2 Dribble Bits
The LXT971A handles dribbles bits in all modes. If one to four dribble bits are received, the nibble
is passed across the MII, and padded with ones if necessary. If five to seven dribble bits are
received, the second nibble is not sent to the MII bus.
Sublayer
Sublayer
Sublayer
PMA
PMD
PCS
LXT971A
De-scrambler
Scrambler/
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
100BASE-TX
Serializer/De-serializer
Link/Carrier Detect
Encoder/Decoder
MII Interface
Fiber Transceiver
100BASE-FX
PECL Interface
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