IDT72V3642L10PF IDT, Integrated Device Technology Inc, IDT72V3642L10PF Datasheet
IDT72V3642L10PF
Specifications of IDT72V3642L10PF
800-1534
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IDT72V3642L10PF Summary of contents
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FEATURES: • • • • • Memory storage capacity: IDT72V3622 – 256 IDT72V3632 – 512 IDT72V3642 – 1,024 • • • • • Supports clock frequencies up to ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 DESCRIPTION (CONTINUED) board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 Each FIFO has a programmable Almost-Empty flag (AEA and AEB) and a programmable Almost-Full flag (AFA and AFB). AEA and AEB ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 PIN DESCRIPTIONS Symbol Name I/O A0-A35 Port A Data I/0 AEA Port A Almost- O Empty Flag (Port A) less than ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 PIN DESCRIPTIONS (CONTINUED) Symbol Name I/O MBA Port A Mailbox I Select MBB Port B Mailbox I Select MBF1 Mail1 Register ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE RANGE (Unless otherwise noted) Symbol V Supply Voltage Range CC V (2) Input Voltage ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 DETERMINING ACTIVE CURRENT CONSUMPTION AND POWER DISSIPATION The I current for the graph in Figure 1 was taken while simultaneously reading ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 TIMING REQUIREMENTS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE Commercial: V =3.3V± 0.30V; for 10ns (100 MHz) operation, ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, C Commercial: V =3.3V± 0.30V; for 10ns (100 MHz) ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 SIGNAL DESCRIPTION RESET After power up, a Master Reset operation must be performed by providing a LOW pulse to RST1 and ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 FIFO WRITE/READ OPERATION The state of the port A data (A0-A35) outputs is controlled by port A Chip Select (CSA) and ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 new data is present in the FIFO output register. When the Output Ready flag is LOW, the previous data word is ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 The Full/Input Ready flag of a FlFO is synchronized to the port clock that writes data to its array. For both ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLKA CLKB t RSTS RST1 FWFT FS1,FS0 FFA/IRA EFB/ORB t RSF AEB t RSF AFA t RSF MBF1 NOTES: 1. FIFO2 ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLK t t CLKL CLKH CLKA FFA/IRA HIGH t ENS1 CSA t ENS2 W/RA t ENS2 MBA t ENS2 ENA ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLK t CLKH CLKB EFB/ORB HIGH CSB W/RB MBB ENB t EN B0-B35 (IDT Standard Mode B0-B35 ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLKA CSA LOW HIGH WRA t ENS2 t ENH MBA t t ENS2 ENH ENA HIGH IRA ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLKA CSA LOW WRA HIGH t ENS2 t MBA t t ENS2 ENA FFA HIGH t DS A0-A35 W1 t SKEW1 ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLKB CSB LOW LOW W/ ENS2 ENH MBB t t ENS2 ENH ENB IRB HIGH ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLKB CSB LOW LOW W/ ENS2 MBB t t ENS2 ENB FFB HIGH B0-B35 t ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLK t t CLKH CLKL CLKB CSB LOW W/RB HIGH LOW MBB t ENS2 ENB HIGH ORB B0- B35 Previous ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLK t t CLKH CLKL CLKB LOW CSB W/RB HIGH LOW MBB t ENS2 ENB EFB HIGH B0-B35 Previous Word ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLK t t CLKH CLKL CLKA CSA LOW W/RA LOW LOW MBA t ENS2 ENA HIGH ORA A0- A35 Previous ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLK t t CLKH CLKL CLKA LOW CSA LOW W/RA LOW MBA t ENS2 ENA EFA HIGH A0-A35 Previous Word ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLKB t t ENS2 ENH ENB t SKEW2 CLKA AEA X2 Words in FIFO2 ENA NOTES: is the minimum time between ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLKB t t ENS2 ENB AFB [D-(Y2+1)] Words in FIFO2 CLKA ENA NOTES: is the minimum time between a rising CLKB ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 CLKB t ENS1 CSB t ENS1 W/RB t ENS2 MBB t ENS2 ENB t B0-B35 CLKA MBF2 CSA W/RA MBA ENA ...
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IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO 256 512 1,024 PARAMETER MEASUREMENT INFORMATION From Output Timing 1.5V Input Data, 1.5V Enable Input VOLTAGE WAVEFORMS SETUP AND HOLD ...
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ORDERING INFORMATION XXXXXX X XX Device Type Power Speed Package NOTES: 1. Industrial temperature range is available by special order. 2. Green parts are available. For specific speeds and packages contact your sales office. DATASHEET DOCUMENT HISTORY 12/19/2000 pg. 11. ...