UPD160040A NEC, UPD160040A Datasheet
UPD160040A
Related parts for UPD160040A
UPD160040A Summary of contents
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... D/A converter and 8-by-2 external power modules. Because the output dynamic range is as large as V common electrode is rendered unnecessary. Also able to deal with dot-line inversion, n-line inversion and column line inversion when mounted on a single side, this source driver is equipped with a built-in 8-bit D/A converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity ...
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BLOCK DIAGRAM STHR R,/L CLK STB C MODE POL21 POL22 POL ...
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PIN CONFIGURATION ( PD160040AN-xxx: TCP) (Copper Foil Surface, Face-up) STHL SRC ORC ...
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... Input The contents of the data register are transferred to the latch circuit at the rising edge. In addition, at the falling edge, the gray scale voltage is supplied to the driver necessary to ensure input of one pulse per horizontal period. Input SRC = H: High-slew-rate mode (large current consumption) ...
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Pin Symbol Pin Name MODE Output reset control POL21, Data inversion POL22 V Driver voltage select SEL V -V -corrected power supplies 0 15 TEST Test V Logic power supply DD1 V Driver power supply DD2 V Logic ground SS1 ...
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RELATIONSHIP BETWEEN INPUT DATA AND OUTPUT VOLTAGE VALUE The PD160040A incorporates a 8-bit D/A converter whose odd output pins and even output pins output respectively gray scale voltages of differing polarity with respect to the LCD’s counter electrode voltage. ...
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Figure 5 2. -Corrected Voltages and Ladder Resistors Ratio V V ’ ’’ 0 255 253 V ’ ’’ 254 252 ’ V ’’ 253 2 r ...
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Figure 5 3. Relationship between Input Data and Output Voltage (POL21, POL22 = L) (1/2) (Output voltage1) V DD2 Output voltage1 Data Data 00H V0' V7 40H V64' V4 01H V1' V6 41H V65' V4+(V3-V4) X 1.0 / 66.4 02H ...
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Figure 5 3. Relationship between Input Data and Output Voltage (POL21, POL22 = L) (2/2) (Output voltage2) 0.5 V Output voltage2 Data Data 00H V0" V8 40H V64" V11 01H V1" V9 41H V65" V12+(V11-V12) X65.4 / 66.4 02H V2" ...
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RELATIONSHIP BETWEEN INPUT DATA AND OUTPUT PIN Data format: 8 bits x 2 RGBs (6 dots) Input width: 48 bits (2-pixel data) (1) R,/ (Right shift) Output Data ...
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RELATIONSHIP BETWEEN MODE, STB, SRC, ORC, POL AND OUTPUT WAVEFORM When MODE = H or open and STB is high level, all outputs are reset (shorted) and the gray-scale voltage is output to LCD in synchronization with the falling ...
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MODE = L STB High-slew-rate period SRC Low-slew-rate period ORC High output resistance period Low output resistance period POL S 2n–1 Voltage selected form Voltage selected form V Hi Voltage selected form V ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Parameter Symbol Logic part supply voltage V DD1 Driver part supply voltage V DD2 Logic part input voltage V I1 Driver part input voltage V I2 Logic part ...
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... The TYP. values refer to an all black or all white input pattern. The MAX. Value refers to the measured values in the dot checkerboard input pattern. 4. Refers to the current consumption per driver when cascades are connected under the assumption of SXGA single-sided mounting (10 units). Switching Characteristics (T ...
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Timing Requirements ( + Parameter Symbol Clock pulse width PW CLK Clock pulse high period PW CLK (H) Clock pulse low period PW CLK (L) Data setup time t SETUP1 Data hold time t ...
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CLK(L) CLK CLK( CLK t t SETUP2 HOLD2 STHR (1st Dr SETUP1 HOLD1 373 379 Invalid 1 ...
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CLK(L) CLK CLK( CLK t t SETUP2 HOLD2 STHR (1st Dr SETUP1 HOLD1 373 379 Invalid 1 ...
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... The following conditions must be met for mounting conditions of the PD160040A. For more details, refer to the [Semiconductor Device Mount Manual] (http://www.necel.com/pkg/en/mount/index.html) Please consult with our sales offices in case other mounting process is used case the mounting is done under different conditions. ...
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... HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry ...