UPD160040A NEC, UPD160040A Datasheet - Page 15

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UPD160040A

Manufacturer Part Number
UPD160040A
Description
384-OUTPUT TFT-LCD SOURCE DRIVER
Manufacturer
NEC
Datasheet
Timing Requirements (T
Remark Unless otherwise specified, the input level is defined to be V
Clock pulse width
Clock pulse high period
Clock pulse low period
Data setup time
Data hold time
Start pulse setup time
Start pulse hold time
POL21, POL22 setup time
POL21, POL22 hold time
STB pulse width
Last data timing
CLK-STB time
STB-CLK time
Time between STB and start pulse t
POL-STB time
STB-POL time
STB-SRC time
STB-ORC time
Parameter
A
= 10 to +75 C, V
PW
PW
PW
t
t
t
t
t
t
PW
t
t
t
t
t
t
t
SETUP1
HOLD1
SETUP2
HOLD2
SETUP3
HOLD3
LDT
CLK-STB
STB-CLK
STB-STH
POL-STB
STB-POL
STB-SRC
STB-ORC
Symbol
CLK
CLK (H)
CLK (L)
STB
3.0 V
2.5 V
3.0 V
2.5 V
CLK
STB
STB
POL
STB
STB
STB
DD1
Data Sheet S15918EJ1V0DS
= 2.5 to 3.6 V, V
or
V
V
V
V
DD1
DD1
DD1
DD1
STB
CLK
STHR (STHL)
POL
ORC
SRC
Condition
< 3.0 V
< 3.0 V
STB
3.6 V
3.6 V
or
SS1
= 0 V, t
IH
= 0.7 V
r
= t
DD1
MIN.
1.0
f
18
25
4
6
4
0
4
0
4
0
4
2
4
4
2
4
4
0
0
= 5.0 ns)
, V
IL
= 0.3 V
TYP.
DD1
www.DataSheet4U.com
.
MAX.
PD160040A
CLK
CLK
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
15

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