UPD160061A NEC, UPD160061A Datasheet - Page 15

• Manufacturer Part Number: UPD160061A
• Description: 384-OUTPUT TFT-LCD SOURCE DRIVER
• Manufacturer: NEC

Timing Requirements (T
Remark Unless otherwise specified, the input level is defined to be V
Clock Pulse Width
Clock Pulse High Period
Clock Pulse Low Period
Data Setup Time
Data Hold Time
Start Pulse Setup Time
Start Pulse Hold Time
POL21, POL22 Setup Time
POL21, POL22 Hold Time
STB Pulse Width
Last Data Timing
STB-CLK Time
Time Between STB and Start Pulse
POL-STB Time
STB-POL Time
Parameter
A
= –10 to +75°C, V
PW
PW
PW
t
t
t
t
t
t
PW
t
t
t
t
t
SETUP1
HOLD1
SETUP2
HOLD2
SETUP3
HOLD3
LDT
STB -CLK
STB-STH
POL-STB
STB-POL
Symbol
CLK
CLK(H)
CLK(L)
STB
DD1
2.3 V ≤ V
2.7 V ≤ V
2.3 V ≤ V
2.7 V ≤ V
2.3 V ≤ V
2.7 V ≤ V
STB ↑→ CLK ↑
STB ↑ → STHR(STHL) ↑
POL ↑ or ↓ → STB ↑
STB ↓ → POL ↓ or ↑
= 2.3 to 3.6 V, V
Data Sheet S16041EJ2V0DS
DD1
DD1
DD1
DD1
DD1
DD1
Condition
< 2.7 V
≤ 3.6 V
< 2.7 V
≤ 3.6 V
< 2.7 V
≤ 3.6 V
SS1
IH
= 0 V, t
= 0.7 V
r
= t
DD1
MIN.
25
15
–5
f
6
4
6
4
4
0
4
0
4
0
2
2
9
2
6
, V
= 5.0 ns)
IL
= 0.3 V
TYP.
DD1
.
MAX.
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µ
PD160061A
CLK
CLK
CLK
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15