CY28341 Cypress Semiconductor, CY28341 Datasheet - Page 8

• Manufacturer Part Number: CY28341
• Description: Universal Single-Chip Clock Solution
• Manufacturer: Cypress Semiconductor

Document #: 38-07367 Rev. *A
Byte 7: Dial-a-Frequency Control Register N
Byte 8: Silicon Signature Register (All bits are Read-only)
Byte9: Dial-A-Frequency Control Register R
Dial-a-Frequency Feature
SMBus Dial-a-Frequency feature is available in this device via
Byte7 and Byte9. P is a PLL constant that depends on the
frequency selection prior to accessing the Dial-a-Frequency
feature.
Bit @Pup
7
6
5
4
3
2
1
0
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
@Pup
@Pup
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
Pin#
Pin#
R5, MSB
R4
R3
R2
R1
R0
DAF_ENB This Edge-trigger bit enables the Dial-a-Frequency N and R bits. It is the transition of this bit
Pin#
Name
Reserved
N6, MSB
N5
N4
N3
N2
N3
N0, LSB
Revision_ID3
Revision_ID2
Revision_ID1
Revision_ID0
Vender_ID3
Vender_ID2
Vender_ID1
Vender_ID0
Reserved
These bits are for programming the PLL’s internal R register. This access allows the user to
modify the CPU frequency at very high resolution (accuracy). All other synchronous clocks
(clocks that are generated from the same PLL, such as PCI) remain at their existing ratios
relative to the CPU clock.
from “0” to “1” that latches the N(6:0) and R(5:0) data into the internal N and R registers. The
user must only program a one time “1” into this bit for every new N and R values
Name
Name
Reserved for device function test.
These bits are for programming the PLL’s internal N register. This access
allows the user to modify the CPU frequency at very high resolution
(accuracy). All other synchronous clocks (clocks that are generated from
the same PLL, such as PCI) remain at their existing ratios relative to the
CPU clock.
Revision ID bit [3]
Revision ID bit [2]
Revision ID bit [1]
Revision ID bit [0]
Cypress Vender ID bit [3].
Cypress Vender ID bit [2].
Cypress Vender ID bit [1].
Cypress Vender ID bit [0].
Table 8.
Spread Spectrum Clock Generation (SSCG)
Spread Spectrum is enabled/disabled via SMBus register
Byte 1, Bit 7.
XXXXX
Description
FS(4:0)
Description
Description
96016000
CY28341
P
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