IDT72255LA20TF IDT, Integrated Device Technology Inc, IDT72255LA20TF Datasheet - Page 11

• Manufacturer Part Number: IDT72255LA20TF
• Description: IC FIFO 8KX18 LP 20NS 64QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT72255LA20TF

• Function: Synchronous
• Memory Size: 144K (8K x 18)
• Access Time: 20ns
• Voltage - Supply: 4 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-STQFP
• Configuration: Dual
• Density: 144Kb
• Access Time (max): 12ns
• Word Size: 18b
• Organization: 8Kx18
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: STQFP
• Clock Freq (max): 50MHz
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 80mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 72255LA20TF

enable the rising edge of RCLK. See Figure 12, Retransmit Timing (FWFT
Mode), for the relevant timing diagram.
HF and PAF flags begin with the rising edge of RCLK that RT is setup.
PAE is synchronized to RCLK, thus on the second rising edge of RCLK
IDT72255LA/72265LA CMOS SuperSync FIFO™
8,192 x 18 and 16,384 x 18
For either IDT Standard mode or FWFT mode, updating of the PAE,
11
after RT is setup, the PAE flag will be updated. HF is asynchronous, thus
the rising edge of RCLK that RT is setup will update HF. PAF is synchro-
nized to WCLK, thus the second rising edge of WCLK that occurs t
after the rising edge of RCLK that RT is setup will update PAF. RT is
synchronized to RCLK.
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
JANUARY 13, 2009
SKEW