AD8065 AD8066 Analog Devices, AD8065 AD8066 Datasheet - Page 5

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AD8065 AD8066

Manufacturer Part Number
AD8065 AD8066
Description
High Performance, 145 MHz Fast FET Op Amps
Manufacturer
Analog Devices
Datasheet
The still-air thermal properties of the package and PCB (
ambient temperature (T
package (P
junction temperature can be calculated as follows
The power dissipated in the package (P
cent power dissipation and the power dissipated in the package
due to the load drive for all outputs. The quiescent power is the
voltage between the supply pins (V
(I
total drive power is V
the package and some in the load (V
between the total drive power and the load power is the drive
power dissipated in the package.
RMS output voltages should be considered. If R
to V
is V
If the rms signal levels are indeterminate, then consider the
worst case, when V
In single-supply operation with R
is V
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD8065/AD8066 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. B
S
). Assuming the load (R
S
OUT
S –
P
D
, as in single-supply operation, then the total drive power
Model
AD8065AR
AD8065AR-REEL
AD8065AR-REEL7
AD8065ART-REEL
AD8065ART-REEL7
AD8066AR
AD8066AR-REEL7
AD8066AR-REEL
AD8066ARM-REEL
AD8066ARM-REEL7
I
= V
=
OUT
quiescent power
D
S
) determine the junction temperature of the die. The
P
.
/2.
D
=
(
V
OUT
P
S
T
D
S
¥
/2
J
= V
=
A
I
=
), and the total power dissipated in the
S
(
V
L
T
+
)
) is referenced to midsupply, then the
S
+
S
I
A
(
/4 for R
OUT
total drive power load power
¥
Ê
Á
Ë
+
V
I
(
2
, some of which is dissipated in
S
S
P
L
)
S
D
¥
+
referenced to V
) times the quiescent current
OUT
L
V
¥
(
Temperature Range
–40ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
V
to midsupply
OUT
R
q
D
S
R
L
) is the sum of the quies-
J A
/ ) 4
L
ˆ
˜ -
¯
I
)
OUT
2
V
). The difference
OUT
R
L
L
is referenced
S–
2
, worst case
ORDERING GUIDE
J A
)
),
Package Description
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
5-Lead SOIC SOT-23
5-Lead SOIC SOT-23
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC MSOP-8
8-Lead SOIC MSOP-8
–5–
Airflow will increase heat dissipation effectively reducing
Also, more metal directly in contact with the package leads from
metal traces, through holes, ground, and power planes, will reduce
the
at the input leads of high speed op amps as discussed in the
board layout section.
Figure 2 shows the maximum safe power dissipation in the package
versus the ambient temperature for the SOIC-8 (125∞C/W) and
SOT-23-5 (180∞C/W) packages on a JEDEC standard four-
layer board.
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current for
the AD8065/AD8066 will likely cause catastrophic failure.
J A
. Care must be taken to minimize parasitic capacitances
2.0
1.5
1.0
0.5
Figure 2. Maximum Power Dissipation vs.
Temperature for a Four-Layer Board
0
–60
MSOP-8
J A
–40
values are approximations.
SOT-23-5
–20
AMBIENT TEMPERATURE – C
Package
Outline
R-8
R-8
R-8
RT-5
RT-5
R-8
R-8
R-8
RM-8
RM-8
0
SOIC-8
20
AD8065/AD8066
40
Branding
Information
HRA
HRA
H1B
H1B
60
80
100
J A
.

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