AD5300BRT Analog Devices, AD5300BRT Datasheet - Page 4
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AD5300BRT
Manufacturer Part Number
AD5300BRT
Description
+2.7 V to +5.5 V/ 140 uA/ Rail-to-Rail Output 8-Bit DAC in an SOT-23
Manufacturer
Analog Devices
Datasheet
1.AD5300BRT.pdf
(12 pages)
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AD5300
SOT-23 Pin Numbers
Pin
No.
1
2
3
4
5
6
Mnemonic
V
GND
V
DIN
SCLK
SYNC
OUT
DD
Analog output voltage from DAC. The output amplifier has rail-to-rail operation.
Ground reference point for all circuitry on the part.
Power Supply Input. These parts can be operated from +2.5 V to +5.5 V and V
coupled to GND.
Serial Data Input. This device has a 16-bit shift register. Data is clocked into the register on the
falling edge of the serial clock input.
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock
input. Data can be transferred at rates up to 30 MHz.
Level triggered control input (active low). This is the frame synchronization signal for the input
data. When SYNC goes low, it enables the input shift register and data is transferred in on the fall-
ing edges of the following clocks. The DAC is updated following the 16th clock cycle unless SYNC
is taken high before this edge in which case the rising edge of SYNC acts as an interrupt and the
write sequence is ignored by the DAC.
Function
V
GND
V
OUT
DD
1
2
3
(Not to Scale)
SOT-23
TOP VIEW
AD5300
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATIONS
6
5
4
SYNC
SCLK
DIN
–4–
V
V
OUT
NC
NC
DD
NC = NO CONNECT
1
2
3
4
(Not to Scale)
TOP VIEW
AD5300
SOIC
8
7
6
5
GND
DIN
SCLK
SYNC
DD
should be de-
REV. A