AD574 Analog Devices, AD574 Datasheet

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AD574

Manufacturer Part Number
AD574
Description
Complete 12-Bit A/D Converter
Manufacturer
Analog Devices
Datasheet

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a
PRODUCT DESCRIPTION
The AD574A is a complete 12-bit successive-approximation
analog-to-digital converter with 3-state output buffer circuitry
for direct interface to an 8- or 16-bit microprocessor bus. A high
precision voltage reference and clock are included on-chip, and
the circuit guarantees full-rated performance without external
circuitry or clock signals.
The AD574A design is implemented using Analog Devices’
Bipolar/I
tions on one chip. Offset, linearity and scaling errors are mini-
mized by active laser-trimming of thin-film resistors at the wafer
stage. The voltage reference uses an implanted buried Zener for
low noise and low drift. On the digital side, I
the successive-approximation register, control circuitry and
3-state output buffers.
The AD574A is available in six different grades. The AD574AJ,
K, and L grades are specified for operation over the 0 C to
+70 C temperature range. The AD574AS, T, and U are speci-
fied for the –55 C to +125 C range. All grades are available in a
28-pin hermetically-sealed ceramic DIP. Also, the J, K, and L
grades are available in a 28-pin plastic DIP and PLCC, and the
J and K grades are available in ceramic LCC.
The S, T, and U grades in ceramic DIP or LCC are available
with optional processing to MIL-STD-883C Class B; the T
and U grades are available as JAN QPL. The Analog Devices’
Military Products Databook should be consulted for details on
/883B testing of the AD574A.
*Protected by U.S. Patent Nos. 3,803,590; 4,213,806; 4,511,413; RE 28,633 .
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
Complete 12-Bit A/D Converter with Reference
8- and 16-Bit Microprocessor Bus Interface
Guaranteed Linearity Over Temperature
No Missing Codes Over Temperature
35 s Maximum Conversion Time
Buried Zener Reference for Long-Term Stability
Ceramic DIP, Plastic DIP or PLCC Package
Available in Higher Speed, Pinout-Compatible Versions
Available in Versions Compliant with MIL-STD-883 and
and Clock
0 C to +70 C – AD574AJ, K, L
–55 C to +125 C – AD574AS, T, U
and Low Gain T.C. 10 ppm/ C max AD574AL
(15 s AD674B, 80 s AD774B; 10 s (with SHA) AD1674)
JAN QPL
2
L process, and integrates all analog and digital func-
12.5 ppm/ C max AD574AU
2
L logic is used for
PRODUCT HIGHLIGHTS
1. The AD574A interfaces to most 8- or 16-bit microproces-
2. The precision, laser-trimmed scaling and bipolar offset resis-
3. The internal buried Zener reference is trimmed to 10.00
4. AD674B (15 s) and AD774B (8 s) provide higher speed,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
DATA MODE SELECT
REFERENCE INPUT
sors. Multiple-mode three-state output buffers connect di-
rectly to the data bus while the read and convert commands
are taken from the control bus. The 12 bits of output data
can be read either as one 12-bit word or as two 8-bit bytes
(one with 8 data bits, the other with 4 data bits and 4 trailing
zeros).
tors provide four calibrated ranges: 0 volts to +10 volts and 0
volts to +20 volts unipolar, –5 volts to +5 volts and –10 volts
to +10 volts bipolar. Typical bipolar offset and full-scale cali-
bration errors of 0.1% can be trimmed to zero with one ex-
ternal component each.
volts with 0.2% maximum error and 15 ppm/ C typical T.C.
The reference is available externally and can drive up to
1.5 mA beyond the requirements of the reference and bipolar
offset resistors.
pin compatibility; AD1674 (10 s) includes on-chip Sample-
Hold Amplifier (SHA).
ANALOG COMMON
+10V REFERENCE
BIPOLAR OFFSET
+12/+15V SUPPLY
BYTE ADDRESS/
-12/-15V SUPPLY
10V SPAN INPUT
20V SPAN INPUT
READ/CONVERT
SHORT CYCLE
CHIP ENABLE
CHIP SELECT
+5V SUPPLY
REF OUT
BIP OFF
REF IN
V
10V
20V
LOGIC
12/8
R/C
V
V
AC
CS
CE
A
CC
EE
IN
IN
O
10
11
12
13
14
1
2
3
4
5
6
7
8
9
BLOCK DIAGRAM AND
19.95k
PIN CONFIGURATION
9.95k
10V
REF
5k
5k
12-Bit A/D Converter
CLOCK
AD574A
3k
I
REF
DAC
CONTROL
4 x N x I
I
DAC
COMP
I
12
DAC
N
=
SAR
REF
8k
V
12
EE
12
AD574A*
S
A
E
O
U
P
U
B
U
E
R
S
3
T
T
T
T
F
F
MSB
LSB
N
B
B
L
E
A
N
B
B
L
E
B
N
B
B
L
E
C
I
I
I
Complete
19
18
17
16
15
28
27
26
25
24
23
22
21
20
Fax: 617/326-8703
DB9
STATUS
STS
DB11
MSB
DB10
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LSB
DIGITAL COMMON
DC
DIGITAL
DATA
OUTPUTS

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AD574 Summary of contents

Page 1

... The AD574A is available in six different grades. The AD574AJ, K, and L grades are specified for operation over the +70 C temperature range. The AD574AS, T, and U are speci- fied for the – +125 C range. All grades are available in a 28-pin hermetically-sealed ceramic DIP. Also, the J, K, and L grades are available in a 28-pin plastic DIP and PLCC, and the J and K grades are available in ceramic LCC ...

Page 2

... AD574ASD AD574AKD AD574AJN AD574AKN AD574AJP AD574AKP AD574AJE AD574AKE or Digital Common. LOGIC –2– – –12 V LOGIC EE AD574AL Max Min Typ Max Units 12 12 Bits 1/2 1/2 LSB 1/2 1/2 LSB 12 Bits 1 1 LSB ...

Page 3

... AD574ASD AD574ATD or Digital Common. LOGIC –3– AD574A AD574AU Max Min Typ Max Units 12 12 Bits 1/2 1/2 LSB 1 1 LSB 12 Bits 1 1 LSB 4 2 LSB 0.25 0.125 % of FS +125 –55 +125 C 1 (2.5) 1 (2.5) ...

Page 4

... X = Package designator. Available packages are: D (D-28) for all grades. E (E-28A) for J and K grades and /883B processed S, T and U grades. N (N-28) for J, K, and L grades. P (P-28A) for PLCC grades. Example: AD574AKN is K grade in plastic DIP. 2 For details on grade and package offerings screened in accordance with MIL-STD-883, refer to Analog Devices Military Products Databook ...

Page 5

... Thus every code must have a finite width. For the AD574AK and U grades, which guarantee no missing codes to 12-bit resolution, all 4096 codes must be present over the entire operating tem- perature ranges. The AD574AJ and S grades guarantee no miss- ing codes to 11-bit resolution over temperature ...

Page 6

... The amplifier should have acceptable loop gain at 500 kHz for use with the AD574A. To check whether the output properties of a signal source are suitable, monitor the AD574’s input with an oscilloscope while a conver- sion is in progress ...

Page 7

... The nominal input impedance into Pin and 10 k into Pin 14. UNIPOLAR CALIBRATION The AD574A is intended to have a nominal 1/2 LSB offset so that the exact analog input for a given code will be in the middle of that code (halfway between the transitions to the codes above and below it) ...

Page 8

... TIMING The AD574A is easily interfaced to a wide variety of micropro- and O cessors and other digital systems. The following discussion of line is O the timing requirements of the AD574A control signals should provide the system designer with useful insight into the opera- tion of the device ...

Page 9

... Figure 7 shows a complete timing diagram for the AD574A con- vert start operation. R/C should be low before both CE and CS are asserted; if R/C is high, a read operation will momentarily occur, possibly resulting in system bus contention. Either may be used to initiate a conversion; however, use recommended since it includes one less propagation delay than CS and is the faster input ...

Page 10

... Figure 14. AD574A Data Format for 8-Bit Bus SPECIFIC PROCESSOR INTERFACE EXAMPLES Z-80 System Interface The AD574A may be interfaced to the Z-80 processor in an I/O or memory mapped configuration. Figure 15 illustrates an I/O or mapped configuration. The Z-80 uses address lines A0–A7 to decode the I/O port address. ...

Page 11

... PC, the I/O bus loading should be limited to one Schottky TTL load. Therefore, a buffer/driver should be used when inter- facing more than two AD574As to the I/O bus. 8086 Interface The data mode select pin (12/8) of the AD574A should be con- nected provide a 12-bit data output. To prevent LOGIC possible bus contention, a demultiplexed and buffered address/ data bus is recommended ...

Page 12

... AD574A 28-Pin Ceramic DIP Package (D-28) 0.048 (1.21) 0.042 (1.07) 0.458 (11.63) 0.442 (11.23) 0.075 (1.91) REF 0.075 (1.91) REF OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Terminal PLCC Package (P-28A) 0.180 (4.57) 0.165 (4.19) 0.048 (1.21) 0.056 (1.42) 0.042 (1.07) 0.042 (1.07 PIN 1 IDENTIFIER 0.050 TOP VIEW (1.27) (PINS DOWN) BSC ...

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