MBM29PL32BM Fujitsu Media Devices, MBM29PL32BM Datasheet - Page 23

• Manufacturer Part Number: MBM29PL32BM
• Description: (MBM29PL32TM/BM) FLASH MEMORY CMOS 32 M (4M X 8/2M X 16) BIT MirrorFlash
• Manufacturer: Fujitsu Media Devices

Page Mode Read
Output Disable
Write
Sector Group Protection
The device is capable of fast read access for random locations within limited address location called Page. The
Page size of the device is 8 bytes / 4 words, within the appropriate Page being selected by the higher address
bits A
within that page. This is an asynchronous operation with the microprocessor supplying the specific word location.
The initial page access is equal to the random access (t
locations specified by the microprocessor fall within that Page) is equivalent to the page address access time
(t
output pins if the device is selected. Fast Page mode, accesses are obtained by keeping A
changing A
With the OE input at logic high level (V
to be in a high impedance state.
Device erasure and programming are accomplished via the command register. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the device function.
The command register itself does not occupy any addressable memory location. The register is a latch used to
store the commands, along with the address and data information needed to execute the command. The com-
mand register is written by bringing WE to V
falling edge of WE or CE, whichever starts later; while data is latched on the rising edge of WE or CE, whichever
starts first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.
The device features hardware sector group protection. This feature will disable both program and erase opera-
tions in any combination of thirty two sector groups of memory.See “Sector Group Address Table
(MBM29PL32TM)” and “Sector Group Address Table (MBM29PL32BM)” in DEVICE BUS OPERATION. The
user‘s side can use the sector group protection using programming equipment. The device is shipped with all
sector groups that are unprotected.
To activate it, the programming equipment must force V
A
be set to the sector to be protected. “Sector Address Table (MBM29PL32TM)” and “Sector Address Table
(MBM29PL32BM)” in DEVICE BUS OPERATION defines the sector address for each of the seventy-one (71)
individual sectors, and “Sector Group Address Table (MBM29PL32TM)” and “Sector Group Address Table
(MBM29PL32BM)” in DEVICE BUS OPERATION defines the sector group address for each of the twenty-four
(24) individual group sectors. Programming of the protection circuitry begins on the falling edge of the WE pulse
and is terminated with the rising edge of the same. Sector group addresses must be held constant during the
WE pulse. See “Sector Group Protection Timing Diagram” in SWITCHING WAVEFORMS and “Sector Group
Protection Algorithm” in FLOW CHART for sector group protection timing diagram and algorithm.
To verify programming of the protection circuitry, the programming equipment must force V
with CE and OE at V
and A
protected sector. Otherwise the device will produce “0” for unprotected sectors. In this mode, the lower order
addresses, except for A
for Autoselect manufacturer and device codes. A
It is also possible to determine if a sector group is protected in the system by writing an Autoselect command.
Performing a read operation at the address location XX02h, where the higher order addresses(A
A
sector group. See “Sector Group Protection Verify Autoselect Codes” in
toselect codes.
PACC
6
16
= A
, A
). Here again, CE selects the device and OE is the output control and should be used to gate data to the
20
15
3
12
= A
, A
to A
) while (A
14
2
1
2
, A
= A
and A
and the address bits A
13
0
, and A
= V
6
, A
0
in Word mode ( A
IL
IL
, A
3
, A
and WE at V
12
0
, A
1
) are the desired sector group address will produce a logical “1” at DQ
2
= V
, A
1
, A
IH
1
, A
2
. The sector group addresses (A
, A
0
3
) = (0, 0, 0, 1, 0) will produce a logical “1” code at device output DQ
, and A
IH
1
. Scanning the sector group addresses (A
to A
1
IH
to A
), output from the devices are disabled. This may cause the output pins
6
0
can be either High or Low. Address locations with A
in Word mode ( A
-1
IL
in Byte mode ) to select the specific word within that Page.
, while CE is at V
-1
requires applying to V
ACC
ID
on address pin A
) and subsequent Page read access (as long as the
1
MBM29PL32TM/BM
to A
IL
20
and OE is at V
, A
-1
in Byte mode) determining the specific word
19
, A
18
, A
IL
on Byte mode.
DEVICE BUS OPERATION for Au-
17
9
, A
and control pin OE, CE = V
IH
20
16
. Addresses are latched on the
, A
, A
19
15
, A
, A
18
14
, A
, A
20
ID
17
1
to A
13
on address pin A
, A
= V
, and A
0
16
20
for a protected
2
IL
, A
, A
constant and
are reserved
15
19
12
, A
, A
) should
14
18
90/10
0
IL
, A
, A
for a
and
13
17
9
,
,
23