MBM29PL65LM Fujitsu Media Devices, MBM29PL65LM Datasheet - Page 16

• Manufacturer Part Number: MBM29PL65LM
• Description: FLASH MEMORY CMOS 64 M (4M X 16) BIT MirrorFlashTM
• Manufacturer: Fujitsu Media Devices

16
MBM29PL65LM
Page Mode Read
Output Disable
Write
Sector Group Protection
Temporary Sector Group Unprotection
The device is capable of fast Page mode read and are compatible with Page mode Mask ROM read operation.
This mode provides faster read access speed for random locations within a page. Page size is 4 words, within
the appropriate Page being selected by the higher address bits A
mode (A
Page read access (as long as the locations specified by the microprocessor fall within that Page) is equivalent
to the page access time (t
With the OE input is at logic high level (V
be in a high impedance state.
Device erase and programming are accomplished via the command register. The contents of the register serve
as input to the internal state machine. The state machine output dictates the device function.
The command register itself does not occupy any addressable memory location. The register is a latch used to
store the commands, along with the address and data information needed to execute the command. The com-
mand register is written by bringing WE to V
falling edge of WE or CE, whichever starts later, while data is latched on the rising edge of WE or CE, whichever
starts first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.
The device features hardware sector group protection. This feature will disable both program and erase opera-
tions in any combination of 32 sector groups of memory. See “Sector Group Address Table (MBM29PL65LM)”
in “
equipment. The device is shipped with all sector groups that are unprotected.
To activate it, the programming equipment must force V
A
sector to be protected. “Sector Address Table (MBM29PL65LM)” in “ DEVICE BUS OPERATION” defines the
sector address for each of the seventy-one (71) individual sectors, and “Sector Group Address Table
(MBM29PL65LM)” in “
four (24) individual group sectors. Programming of the protection circuitry begins on the falling edge of the WE
pulse and is terminated with the rising edge of the same. Sector group addresses must be held constant during
the WE pulse. See “Sector Group Protection Timing Diagram” in “
Protection Algorithm” in “ FLOW CHART” for sector group protection timing diagram and algorithm.
To verify programming of the protection circuitry, the programming equipment must force V
with CE and OE at V
A
the device will produce “0” for unprotected sectors. In this mode, the lower order addresses, except for A
A
Where the high order addresses (A
logical “1” at DQ
“ DEVICE BUS OPERATION” for Autoselect codes.
This feature allows temporary unprotection of previously protected sector groups of the devices in order to change
data. The Sector Group Unprotection mode is activated by setting the RESET pin to high voltage (V
this mode, formerly protected sector groups can be programmed or erased by selecting the sector group ad-
dresses. Once the V
6
3
2
, A
, A
= A
2
3
, A
DEVICE BUS OPERATION”. The user’s side can use the sector group protection using programming
3
and A
= A
1
1
, A
to A
2
0
) = (0, 0, 0, 1, 0) will produce a logical “1” code at device output DQ
6
= A
can be either High or Low.
-1
in Byte mode). The initial page access is equal to the random access (t
0
0
for a protected sector group. See “Sector Group Protection Verify Autoselect Codes” in
= V
IL
ID
IL
and WE at V
, A
is taken away from the RESET pin, all the previously protected sector groups will be
DEVICE BUS OPERATION” defines the sector group address for each of the twenty-
1
PACC
= V
).
IH
-90/10
. The sector group addresses (A
IH
21
. Scanning the sector group addresses (A
, A
20
, A
IH
), output from the device is disabled. This causes the output pins to
19
IL
, while CE is at V
, A
18
and A
17
ID
) are the desired sector group address will produce a
on address pin A
IL
and OE is at V
21
21
, A
to A
20
TIMING DIAGRAM” and “Sector Group
, A
2
and the address bits A
19
, A
9
and control pin OE, CE = V
0
21
IH
18
for a protected sector. Otherwise
, A
. Addresses are latched on the
, and A
20
, A
19
17
, A
) should be set to the
ACC
18
ID
and A
) and subsequent
on address pin A
1
to A
17
) while (A
ID
0
). During
in Word
IL
0
, A
and
6
1
9
,
,