MBM29PL65LM Fujitsu Media Devices, MBM29PL65LM Datasheet - Page 27

• Manufacturer Part Number: MBM29PL65LM
• Description: FLASH MEMORY CMOS 64 M (4M X 16) BIT MirrorFlashTM
• Manufacturer: Fujitsu Media Devices

*1 : Successive reads from the erasing or erase-suspend sector will cause DQ
*2 : Reading from non-erase suspend sector address will indicate logic “1” at the DQ
DQ
Data Protection
Low V
Write Pulse “Glitch” Protection
Logical Inhibit
Power-up Write Inhibit
Sector Protection
Program
Erase
Erase-Suspend-Read
Erase-Suspend-Program
(Erase-Suspended Sector)
Write-to-Buffer Abort
DQ
The system must issue the Write-to-Buffer-Abort-Reset command sequence to return the device to reading array
data. See "Write Buffer Programming Operations" section for more details.
The device is designed to offer protection against accidental erasure or programming caused by spurious system
level signals that may exist during power transitions. During power up device automatically resets internal state
machine to Read mode. Also, with its control register architecture, alteration of memory contents only occurs
after successful completion of specific multi-bus cycle command sequence.
Device also incorporates several features to prevent inadvertent write cycles resulting from V
power-down transitions or system noise.
To avoid initiation of a write cycle during V
than V
Under this condition, the device will reset to the read mode. Subsequent writes will be ignored until the V
is greater than V
unintentional writes when V
If Embedded Erase Algorithm is interrupted, the intervened erasing sector(s) is(are) not valid.
Noise pulses of less than 3 ns (typical) on OE, CE, or WE will not initiate a write cycle.
Writing is inhibited by holding any one of OE = V
must be a logical zero while OE is a logical one.
Power-up of the device with WE = CE = V
The internal state machine is automatically reset to read mode on power-up.
Device user is able to protect each sector group individually to store and protect data. Protection circuit voids
both write and erase commands that are addressed to protected sectors. Any commands to write or erase
addressed to protected sector are ignored.
1
1
CC
indicates whether a Write-to-Buffer operation was aborted. Under these conditions DQ
Write Inhibit
LKO
. If V
Mode
CC
< V
LKO
. It is the user’s responsibility to ensure that the control pins are logically correct to prevent
LKO
, the command register is disabled and all internal program/erase circuits are disabled.
CC
is above V
LKO
Toggle Bit Status Table
CC
IL
DQ
DQ
DQ
.
and OE = V
0
1
power-up and power-down, a write cycle is locked out for V
7
7
7
IL
, CE = V
IH
will not accept commands on the rising edge of WE.
IH
, or WE = V
Toggle
Toggle
Toggle
DQ
MBM29PL65LM
1
6
IH
. To initiate a write cycle, CE and WE
2
to toggle.
2
bit.
Toggle *
Toggle *
DQ
1 *
1
CC
1
produces a "1".
2
2
power-up and
1
1
-90/10
CC
CC
level
less
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